SP505 Datasheet, PDF (22/35 Pages) Sipex Corporation – WAN Multi-Mode Serial Transceiver

Receiver Enable and Output
Only one receiver includes an enable line.
The SCTEN input for the SCT receiver can
enable or tri-state the output of the receiver.
When the pin is at a logic "0", the receiver
output is high impedance and any input
termination internal connected is switched
off. The inputs will be at approximately 10kΩ
during tri-state.
outputs and receiver outputs can be put
into tri-state mode by writing 0000 to the
driver decode switch. All internal termination
networks are switched off during this mode.
Individual tri-state capability is possible for
all drivers through each driver's own enable
control input. The SCT receiver also contains
an individual enable input. When this control
pin is disabled (logic "0"), the V.11 and V.35
All receivers include a fail-safe feature that
outputs a logic "1" when the receiver inputs
are open. The differential receivers allocated
input termination is deactivated. The 0000
decoder word will override the enable control
line for the one receiver (SCT).
for data and clock signals (RxD, RxC, and
SCT) have advanced fail-safe that outputs
a logic "1" when the inputs are either open,
shorted, or terminated. Other discrete or
integrated implementations require external
pull-up and pull-down resistors to define the
receiver output state. For single-ended V.28
receivers, there are internal 5kΩ pull-down
resistors on the inputs which produces a
logic high ("1") at the receiver outputs. The
single-ended V.10 receivers produce a logic
LOW ("0") on the output when the inputs are
open. This is due to an internal pull-up device
connected to the input. The differential re-
The SP505 contains internal loopback ca-
pabilities for self-diagnostic tests. Loopback
is enabled through the decoder. To initiate
single-ended mode loopback, the decoder
word is 1010. To initiate differential mode
loopback, the decoder word is 1011. The
minimum transmission rates into the SP505
under loopback conditions are 120kbps for
single-ended mode and 5Mbps for differential
mode. The driver outputs are tri-stated and
the receiver inputs are disabled during loop-
back. The receiver input impedance during
loopback is approximately 10kΩ.
ceivers have the same internal pull-up device
on the non-inverting input which produces
a logic HIGH ("1") at the receiver output,
representing an "OFF" state to the HDLC
controller. The three differential receivers
when configured in V.35 mode (RxD, RxC
& SCT) will also include fail-safe even when
the internal termination resistor network is
connected and the inputs are either shorted
or floating.
The SP505 is equipped with a latch control
for the four (4) decoder bits. The latch control
pin is pin 8 of the SP505. The latch control
is active low, a logic low on pin 8 will latch
the decoder signals. A logic "1" on pin 8 will
force the latch to be transparent to the user.
A pulse width of at least 30ns is required to
latch the decoder for the next mode. The
resultant output is typically 600ns after the
latch control pin is toggled assuming that
Decoder
the decoder word is set.
The SP505 has the ability to change the
interface mode of the drivers or receivers
via a 4–bit switch. The decoder for the driv-
ers and receivers can be latched through a
control pin.
NET1/2 & TBR2 European Compliancy
As with all of Sipex's previous multi-proto-
col serial transceiver ICs, the drivers and
receivers have been designed to meet all
the requirements to NET1/2. The SP505 is
The control word can be latched either high
or low to write the appropriate code into the
SP505. The codes shown in Tables 1 and
internally tested to all the NET1/2 physical
layer testing parameters and the ITU Series
V specifications.
2 are the only specified, valid modes for the
SP505. Undefined codes may represent
other interface modes not specified (consult
the factory for more information). The drivers
and receivers are controlled with the data
bits labeled DEC₃–DEC₀. All of the drivers
With the emergence of ETSI TBR2 (Technical
Basis for Regulation) document now in place
as an alternative for European compliancy,
Sipex has tested the SP505 to TBR2 speci-
fications to ensure "CE" approval for either
testing method.
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • [phone] • Fax [phone] • www.exar.com
SP505_100_081308
22