XR18W750 Datasheet, PDF (20/44 Pages) Exar Corporation – WIRELESS UART CONTROLLER

XR18W750
WIRELESS UART CONTROLLER
REV. 1.0.0
TABLE 8: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS REG READ/
A2 A1 A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3 BIT-2 BIT-1 BIT-0 COMMENT
000
001
DLL RD/WR
DLM RD/WR
Bit-7
Bit-7
Baud Rate Generator Divisor
Bit-6 Bit-5 Bit-4
Bit-3
Bit-6 Bit-5 Bit-4
Bit-3
Bit-2
Bit-2
Bit-1
Bit-1
Bit-0 ^LCR[7]=1
LCR ≠ 0xBF
Bit-0
0 0 0 DREV RD
0 0 1 DVID RD
Bit-7
0
Bit-6
0
Bit-5
0
Bit-4
0
Bit-3
1
Bit-2
0
Bit-1
1
Bit-0
0
LCR[7]=1
LCR ≠ 0xBF
DLL=0x00
DLM=0x00
Enhanced Registers
0 0 0 TRG WR Bit-7 Bit-6 Bit-5 Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 FC
RD Bit-7 Bit-6 Bit-5 Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
001
FCTR RD/WR RX/TX SCPAD
Mode Swap
Trig
Table
Bit-1
Trig
Table
Bit-0
Rsrvd
010
EFR
RD/WR Auto
CTS
Enable
Auto
RTS
Enable
1 X X Rsrvd RD/WR Bit-7 Bit-6
Rsrvd
Enable
IER [7:4],
ISR [5:4],
FCR[5:4],
MCR[7:5]
Bit-5 Bit-4
Rsrvd
Bit-3
Rsrvd
Rsrvd
Auto
RTS
Hyst
Bit-1
Rsrvd
Auto
RTS
Hyst
Bit-0
Rsrvd
LCR=0XBF
Bit-2 Bit-1 Bit-0
5.0 INTERNAL REGISTER DESCRIPTIONS
5.1 Receive Holding Register (RHR) - Read- Only
SEE”RECEIVER” ON PAGE 14.
5.2 Transmit Holding Register (THR) - Write-Only
SEE”TRANSMITTER” ON PAGE 12.
5.3 Interrupt Enable Register (IER) - Read/Write
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
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