DAN-140 Datasheet, PDF (2/3 Pages) Exar Corporation – EXAR’S XR16C850 COMPARED

DATA COMMUNICATIONS APPLICATION NOTE
DAN140
1.3 FIRMWARE DIFFERENCES
• The internal registers of the XR16C850 are much simpler than the internal registers of the OX16C950. The
XR16C850 only has one level of shadow registers while the OX16C950 has 3 levels. The XR16C850 has
the 16C550 Standard Register Set and the Enhanced Register Set. The Enhanced Register Set can be
accessed by writing 0xBF to the LCR register. Note that the XR16C850 has more registers in the Enhanced
Register Set than the OX16C950 has in their Enhanced Register Set. The OX16C950 has a Standard Reg-
ister Set, Enhanced Register Set, Indexed Control Register Set and Additional Status Register Set. As long
as the last value written to LCR was not 0xBF, the Index Control Register (ICR) is accessed by writing the
desired address offset for the ICR to the Scratchpad register and then writing to the Index Control Register.
Note that this is for writing to the Index Control Register only. To read from the Index Control Register, you
must write to a bit in one of the Indexed Control Registers to enable reading from the Index Control Register.
The Additional Status Registers can only be read when another bit in the Indexed Control Registers is set.
• The XR16C850 has Automatic 2 character Xon/Xoff Software Flow Control. In Automatic 2 character Xon/
Xoff Software Flow Control, two flow control characters (Xoff1, Xoff2, Xon1, Xon2) are sent at the appropri-
ate times instead of just a single character. This is to ensure that the first character is not accidentally inter-
preted as a software flow control character if it was not meant to be. More importantly, it will allow the soft-
ware routine to be able to use the entire character set including the Xon and Xoff characters as part of the
data stream since they will not necessarily be interpreted as software flow control characters unless they are
received one after another. The OX16C950 only has the Automatic 1 character Xon/Xoff Software Flow
Control.
• The XR16C850 and OX16C950 both have Automatic RS485 Half-Duplex Control that will automatically con-
trol the direction of the RS485 transceivers. The Automatic RS485 Half-Duplex Control is through the OP1#
pin for the XR16C850 and through the RTS# pin for the OX16C950.
• The XR16C850 has 3 selectable levels of RTS Hysteresis ranging from ±4 to ±8 when programmable trigger
levels (Table-D) are used. For example if the RX Trigger Level was programmed for 32 bytes and the RTS
Hysteresis was selected at ±8, the RTS# pin will not be forced to a logic 1 (RTS off) until the receive FIFO
reaches 40 bytes. The RTS# pin will return to a logic 0 (RTS on) after the RX FIFO is unloaded to 24 bytes.
The OX16C950 has a similar feature. For the OX16C950, the software driver has to manually select the
upper level to halt transmission and the lower level to resume transmission independent of the RX Trigger
Level. It is also up to the software driver to ensure that the upper level is greater than the lower level since
the device does not perform that check.
• The OX16C950 can be programmed to operate in a wake-up mode for Multidrop applications. This feature is
not available in the XR16C850.
• The OX16C950 can disable and enable the TX or RX output. This feature is not available in the XR16C850.
• The XR16C850 has a BRG prescaler of 1 or 4. The OX16C950 has a Baud Rate Generator Prescaler of 1 to
31.875.
• The XR16C850 has a Data Sampling Rate of 16X. The OX16C950 has a Data Sampling Rate of 4X to 16X.
2