XR8051 Datasheet, PDF (18/27 Pages) Exar Corporation – Low Cost, High Speed Rail-to-Rail Amplifiers

XR8051, XR8052, XR8054
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 2kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature is
not exceeded. Guidelines listed below can be used to verify
that the particular application will not cause the device to
operate beyond it’s intended operating range.
Maximum power levels are set by the absolute maximum
junction rating of 170°C. To calculate the junction
temperature, the package thermal resistance value Theta_JA
(θ_JA) is used along with the total die power dissipation.
T_Junction = T_Ambient + (θ_JA × P_D)
Where T_Ambient is the temperature of the working
environment.
In order to determine P_D, the power dissipated in the load
needs to be subtracted from the total power delivered by the
supplies.
P_D = P_supply - P_load
Supply power is calculated by the standard power equation.
Assuming the load is referenced in the middle of the power
rails or V_supply/2.
The XR8051 is short circuit protected. However, this may not
guarantee that the maximum junction temperature (+150°C)
is not exceeded under all conditions. Figure 6 shows the
maximum safe power dissipation in the package vs. the
ambient temperature for the packages available.
2.5
TSSOP-14
2
1.5
SOIC-8
SOIC-14
1
0.5
MSOP-8
0
-40 -20
TSOT-5
0
20
40
60
80
Ambient Temperature (°C)
100 120
Figure 6. Maximum Power Derating
P_supply = V_supply × I_RMSsupply
V_supply = V_S+ - V_S-
Power delivered to a purely resistive load is:
P_load = ((V_load)_RMS²)/Rload_eff
The effective load resistor (Rload_eff) will need to include the
effect of the feedback network. For instance,
Driving Capacitive Loads
Increased phase delay at the output due to capacitive loading
can cause ringing, peaking in the frequency response, and
possible unstable behavior. Use a series resistance, R_S,
between the amplifier and the load to help improve stability
and settling performance. Refer to Figure 7.
Rload_eff in Figure 3 would be calculated as:
R_L || (R_f + R_g)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, P_D can be found from
Input
+
-
Rf
Rg
Rs
Output
CL R_L
Figure 7. Addition of R_S for Driving Capacitive Loads
P_D = P_Quiescent + P_Dynamic - P_load
Quiescent power can be derived from the specified I_S values
along with known supply voltage, V_supply. Load power can
be calculated as above with the desired signal amplitudes
using:
(V_load)_RMS = V_peak / √2
( I_load)_RMS = ( V_load)_RMS / Rload_eff
Table 1 provides the recommended R_S for various capacitive
loads. The recommended R_S values result in approximately
<1dB peaking in the frequency response.
C_L (pF)
22pF
47pF
R_S (Ω)
0
15
-3dB BW (MHz)
120
80
The dynamic power is focused primarily within the output
100pF
15
65
stage driving the load. This value can be calculated as:
492pF
6.5
40
P_Dynamic = (V_S+ - V_load)_RMS × ( I_load)_RMS
Table 1: Recommended R_S vs. C_L
© 2007-2014 Exar Corporation
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exar.com/XR8051
Rev 1B