XRD98L23 Datasheet, PDF (15/32 Pages) Exar Corporation – 8-Bit, High-speed Linear CIS/CCD Sensor Signal Processor with Serial Control

XRD98L23
CIS
ADCCLK
DB [7.0]
CLAMP
CIS Mode Timing -- AC Coupled
(CLAMP enabled)
Pixel N-1
Pixel N
Pixel N+1
tap
tap
tckpd
tckhw tcklw
tclpw
tdv tdv
N-8 N/A N-7 N/A N-6 N/A N-5 N/A
Figure 9. Timing Diagram for Figure 8
Rev. 1.00
ADCCLK
↓
↑
HI
LO
CLAMP
HI
LO
Events
ADC Sample & PGA Start Track of next Pixel
Data Out
Invalid Data Out
ADC Track PGA Output
ADC Hold/Convert
Table 2.
Events
PGA Tracks V_CLAMP & C_EXT is Charged to
V - V , which is equal to V
BLACK
CLAMP
BLACK
PGA Tracks VIN_PP
Table 3.
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