XRP7708 Datasheet, PDF (14/27 Pages) Exar Corporation – Quad Channel Digital PWM Step Down Controller

XRP7708
Quad Channel Digital PWM Step Down Controller
Bus serial command. The registers that control the channel enable functions are the
SET_EN_CONFIG and SET_CH_EN_I2C.
INTERNAL GATE DRIVERS
The XRP7708 integrates Internal Gate Drivers for all 4 PWM channels. These drivers are optimized
to drive both high-side and low side N-MOSFETs for synchronous operation. Both high side and low
side drivers have the capability of driving 1 nF load with 30 ns rise and fall time. The drivers have
built-in non-overlapping circuitry to prevent simultaneous conduction of the two MOSFETs.
FAULT HANDLING
While the chip is operating there are four different types of fault handling:
• Under Voltage Lockout (UVLO) monitors the input voltage to the chip, and the chip will
shutdown all channels if the voltage drops to critical levels.
• Over Temperature Protection (OTP) monitors the temperature of the chip, and the chip
will shutdown all channels if the temperature rises to critical levels.
• Over Voltage Protection (OVP) monitors the voltage of channel and will shutdown the
channel if it surpasses its voltage threshold.
• Over Current Protection (OCP) monitors the current of a channel, and will shutdown the
channel if it surpasses its current threshold. The channel will be automatically restarted
after a 200ms delay.
Under Voltage Lockout (UVLO)
There are two locations where the under voltage can be sensed: VIN1 and VIN2. The
SET_UVLO_WARN_VINx register that sets the under voltage warning set point condition at
100mV increments. When the warning threshold is reached, the Host is informed via a GPIO or by
reading the READ_WARN_FLAG register.
The SET_UVLO_TARG_VINx register that controls the under voltage fault set point condition at
100mV increments. This fault condition will be indicated in the READ_FAULT_WARN register.
When an under voltage fault condition occurs (either on VIN1 or VIN2), the fault flag register is set
and all of the XRP7708 outputs are shut down. The measured input voltages can be read back
using the READ_VIN1 or READ_VIN2 register, and both registers have a resolution of 100mV
per LSB. When the UVLO condition clears (voltage rises above the UVLO Warning Threshold), the
chip can be configured to automatically restart.
VIN1
This is a multi-function pin that provides power to both the Standby Linear Regulator and internal
linear regulators to generate VCCA, VDD, and the Standby LDO (LDOUT).
It is also used as a UVLO detection pin. If Vin1 falls below its user programmed limit, all channels
are shut down.
VIN2
VIN2 is required to be tied to VIN1 pin. It can be used as a UVLO detection pin. If VIN2 falls below
its user programmed limit, all channels are shut down.
Temperature Monitoring and Over Temperature Protection (OTP)
• Reading the junction temperature
© 2010 Exar Corporation
14/27
Rev. 1.0.3