XRT75R12D_07 Datasheet, PDF (128/133 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.3
TABLE 50: MEASURED APS RECOVERY TIME AS A FUNCTION OF DS3 PPM OFFSET
DS3 PPM OFFSET (PER W&G ANT-20SE)
0 ppm
MEASURED APS RECOVERY TIME (PER LOGIC ANALYZER)
1.89ms
+10 ppm
1.21ms
+20 ppm
1.64ms
+30 ppm
1.32ms
+40 ppm
+99 ppm
1.25ms
1.35ms
NOTE: The APS Completion (or Recovery) time requirement is 50ms.
Configuring the LIU to be able to comply with the SONET APS Recovery Time Requirements of 50ms
Quite simply, the user can configure a given Jitter Attenuator block (associated with a given channel) to (1)
comply with the "APS Completion Time" requirements per Telcordia GR-253-CORE, and (2) also comply with
the "Category I Intrinsic Jitter Requirements per Telcordia GR-253-CORE (for DS3 applications) by making
sure that Bit 4 (SONET APS Recovery Time Disable Ch_n), within the Jitter Attenuator Control Register is
cleared to "0" as depicted below.
TABLE 51: JITTER ATTENUATOR CONTROL REGISTER - CHANNEL N, ADDRESS LOCATION; 0XM7
(M = 0-5 & 8-D) (N = [0:11])
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
SONET APS
Recovery
Time Disable
Ch_n
JA RESET
Ch_n
JA1 Ch_n JA in Tx Path JA0 Ch_n
Ch_n
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
1
NOTE: The user can optionally disable the "SONET APS Recovery Time Mode".
8.8.4 How should one configure the LIU, if one needs to support "Daisy-Chain" Testing at the end
Customer's site?
Daisy-Chain testing is emerging as a new requirements that many of our customers are imposing on our
SONET Mapper and LIU products. Many System Designer/Manufacturers are finding out that whenever their
end-customers that are evaluating and testing out their systems (in order to determine if they wish to move
forward and start purchasing this equipment in volume) are routinely demanding that they be able to test out
these systems with a single piece of test equipment. This means that the end-customer would like to take a
single piece of DS3 or STS-1 test equipment and (with this test equipment) snake the DS3 or STS-1 traffic
(that this test equipment will generate) through many or (preferably all) channels within the system. For
example, we have had request from our customers that (on a system that supports OC-192) our silicon be able
to support this DS3 or STS-1 traffic snaking through the 192 DS3 or STS-1 ports within this system.
After extensive testing, we have determined that the best approach to complying with test "Daisy-Chain"
Testing requirements, is to configure the Jitter Attenuator blocks (within each of the Channels within the LIU)
into the "32-Bit" Mode. The user can configure the Jitter Attenuator block (within a given channel of the LIU) to
operate in this mode by settings in the table below.
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