XR76115 Datasheet, PDF (12/16 Pages) Exar Corporation – 15A Synchronous Step Down COT Regulator

XR76115
Eff. is the converter efficiency corresponding to nominal
IOUT
Substituting for TON in the first equation we get:
.
2.5 10
3 10
Over-Current Protection (OCP)
If the load current exceeds the programmed over-current
IOCP for four consecutive switching cycles, then the
regulator enters the hiccup mode of operation. In hiccup
mode the MOSFET gates are turned off for 110ms (hiccup
timeout). Following the hiccup timeout a soft-start is
attempted. If OCP persists, hiccup timeout will repeat. The
regulator will remain in hiccup mode until load current is
reduced below the programmed IOCP. In order to program
over-current protection use the following equation:
!" #$ ^{+ 8'}
1 2 _0.6 1
The recommended value for R2 is 2kΩ.
Programming the Soft-start
Place a capacitor CSS between the SS and GND pins to
program the soft-start. In order to program a soft-start time
of TSS, calculate the required capacitance CSS from the
following equation:
10*+
)_$$
$$ _0.6
Feed-Forward Capacitor CFF
A feed-forward capacitor CFF may be necessary depending
on the Equivalent Series Resistance (ESR) of COUT. If only
ceramic output capacitors are used then a CFF is
necessary. Calculate CFF from:
1
),, _{2 - 1 7 0)}
where:
where:
RLIM is resistor value for programming IOCP
IOCP is the over-current value to be programmed
RDSON=4.6mΩ(maximum specification)
8mV is the OCP comparator offset
ILIM is the internal current that generates the
necessary OCP comparator threshold (use 45µA)
R1 is the resistor that CFF is placed in parallel with
fLC is the frequency of the output filter double pole
fLC must be less than 15kHz when using ceramic COUT. If
necessary, increase COUT and/or L in order to meet this
constraint.
When using capacitors with higher ESR such as
Panasonic TPE series, a CFF is not required provided
following conditions are met:
Note that ILIM has a positive temperature coefficient of
0.4%/°C. This is meant to approximately match and
compensate for positive temperature coefficient of the
synchronous FET.
1. The frequency of the output LC double pole fLC
should be less than 10kHz
2. The frequency of ESR zero fZERO,ESR should be at
least five times larger than fLC
The above equation is for worst-case analysis and
safeguards against premature OCP. Actual value of IOCP,
for a given RLIM, will be higher than that predicted by the
above equation. Typical IOCP versus RLIM is shown in
Figure 16.
Short-Circuit Protection (SCP)
If the output voltage drops below 60% of its programmed
value, the regulator will enter hiccup mode. Hiccup mode
will persist until the short-circuit is removed. The SCP
circuit becomes active after PGOOD asserts high.
Over-Temperature Protection (OTP)
OTP triggers at a nominal controller temperature of 150°C.
The gates of the switching FET and the synchronous FET
are turned off. When die temperature cools down to
135°C, soft-start is initiated and operation resumes.
Programming the Output Voltage
Note that if fZERO,ESR is less than 5 x fLC, then it is
recommended to set the fLC at less than 2kHz. CFF is still
not required.
Feed-Forward Resistor RFF
Poor PCB layout and/or extremely fast switching FETs can
cause switching noise at the output and may couple to the
FB pin via CFF. Excessive noise at FB will cause poor load
regulation. To solve this problem place a resistor RFF in
series with CFF. RFF value up to 2% of R1 is acceptable.
Maximum Allowable Voltage Ripple at FB
Pin
Note that the steady-state voltage ripple at the feedback
pin (VFB,RIPPLE) must not exceed 50mV in order for the
controller to function correctly. If VFB,RIPPLE is larger than
50mV then COUT should be increased as necessary in
order to keep the VFB,RIPPLE below 50mV.
Use an external voltage divider as shown in Figure 1 to
program the output voltage VOUT.
© 2015 Exar Corporation
12/16
www.exar.com
Rev. 1B