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XR1008 Datasheet, PDF (12/17 Pages) Exar Corporation – 0.5mA, 75MHz Rail-to-Rail Amplifiers
XR1008, XR2008
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
Overdrive Recovery
For an ampli er, an overdrive condition occurs when the
output and/or input ranges are exceeded. The recovery time
varies based on whether the input or output is overdriven
and by how much the ranges are exceeded. The XR1008,
and XR2008 will typically recover in less than 20ns from
an overdrive condition. Figure 5 shows the XR1008 in an
overdriven condition.
G=5
Output
Input
Evaluation Board #
CEB002
CEB003
CEB006
CEB010
Products
XR1008 in TSOT
XR1008 in SOIC
XR2008 in SOIC
XR2008 in MSOP
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 9-18 These evaluation boards are built for dual-
supply operation. Follow these steps to use the board in a
single-supply application:
1. Short -VS to ground.
2. Use C3 and C4, if the -VS pin of the ampli er is not
directly connected to the ground plane.
Time (200ns/div)
Figure 8: Overdrive Recovery
Layout Considerations
General layout and supply bypassing play major roles in
high frequency performance. Exar has evaluation boards to
use as a guide for high frequency layout and as an aid in
device testing and characterization. Follow the steps below
as a basis for high frequency layout:
■ Include 6.8µF and 0.1µF ceramic capacitors for power supply
decoupling
■ Place the 6.8µF capacitor within 0.75 inches of the power pin
■ Place the 0.1µF capacitor within 0.1 inches of the power pin
■ Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic
capacitance
■ Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more
information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Figure 9. CEB002 & CEB003 Schematic
© 2014 Exar Corporation
12 / 17
exar.com/XR1008
Rev 1B