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XRK4993 Datasheet, PDF (1/13 Pages) Exar Corporation – 3.3V PROGRAMMABLE SKEW CLOCK BUFFER
XRK4993
3.3V PROGRAMMABLE SKEW CLOCK BUFFER
FEBRUARY 2007
REV. 1.0.0
FUNCTIONAL DESCRIPTION
The XRK4993 is a 3.3V High-Speed Low-Voltage
Programmable Skew Clock Buffer. It is intended for
high-performance computer systems and offers user
selectable control over system clock functions to
optimize timing. Eight ouputs, arranged in four
banks, can each drive 75Ω terminated transmission
lines while delivering minimal and specified output
skews and full-swing Low Voltage TTL logic levels.
Banks A, B, C (two outputs per bank) can be
individually selected for one of nine delay or function
configurations through two dedicated three-level
inputs. These outputs are able to lead or lag the
CLKIN input reference clock by up to 6 time units
from their nominal "zero" skew position. The
integrated PLL allows external load and transmission
line delay effects to be canceled achieving zero delay
capability. Combining the zero delay capability with
the selectable output skew functions, output-to-output
delays of up to +12 time units can be created.
The XRK4993’s divide functions (divide-by-two and
divide-by-four) allow distribution of a low-frequency
clock that can be multiplied by two or four at the clock
destination. This feature facilitates clock distribution
while allowing maximum system clock flexibility.
When the OE pin is held low, all the outputs are
synchronously enabled. However, if OE is held high,
all the outputs except QC0 and QC1 are
synchronously disabled.
When PE is held high, all the outputs are
synchronized with the positive edge of the CLKIN
clock input. When PE is held low, all the outputs are
synchronized with the negative edge of CLKIN. The
device has LVTTL outputs with 12mA balanced drive.
FEATURES
• 3 pairs of programmable skew outputs
• Low skew: 200ps same pair, 250ps all outputs
• Selectable positive or negative edge
synchronization: Excellent for DSP applications
• Synchronous output enable
• Output frequency: 3.75MHz to 85MHz
• 2x, 4x, 1/2, and 1/4 output frequencies
• 3 skew grades
• 3-level inputs for skew and PLL range control
• PLL bypass mode
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Available in 28 pin QSOP package
• Jitter < 200 ps peak-to-peak
• CLKIN input is 5V tolerant
FIGURE 1. BLOCK DIAGRAM OF THE XRK4993
H
QA0
M
QA1
CLKIN
Ref
L
PLL
QB0
FB_IN
PE
FSEL*
PLL_BYPASS*
SELA[1:0]*
SELB[1:0]*
SELC[1:0]*
Feedback
2
2
2
QB1
Bank “SKEW”
Control
QC0
QC1
QD0
QD1
OE
* Three-level inputs
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com