XR20M1172_09 Datasheet, PDF (1/58 Pages) Exar Corporation – TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
JUNE 2009
REV. 1.0.1
GENERAL DESCRIPTION
The XR20M1172¹ (M1172) is a high performance two
channel universal asynchronous receiver and
transmitter (UART) with 64 byte TX and RX FIFOs
and a selectable I²C/SPI slave interface. The M1172
operates from 1.62 to 3.63 volts. The standard
features include 16 selectable TX and RX FIFO
trigger levels, automatic hardware (RTS/CTS) and
software (Xon/Xoff) flow control, and a complete
modem interface. Onboard registers provide the user
with operational status and data error flags. An
internal loopback capability allows system
diagnostics. Additional enhanced features includes a
programmable fractional baud rate generator and 8X
and 4X sampling rate that allows for a maximum baud
rate of 16 Mbps at 3.3V. The M1172 is available in the
32-pin QFN and 28-pin TSSOP packages. The 32-
pin QFN package has the EN485# and ENIR# pins to
allow the UART to power-up in the Auto RS485 mode
or the Infrared mode.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
• Portable Appliances
• Battery-Operated Devices
• Cellular Data Devices
• Factory Automation and Process Controls
FEATURES
• 1.62 to 3.6 Volt Operation
• Selectable I²C/SPI Interface
• Full-featured UART
■ Data rate of up to 16 Mbps at 3.3 V
■ Data rate of up to 12.5 Mbps at 2.5 V
■ Data rate of up to 8 Mbps at 1.8 V
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ 16 Selectable TX and RX FIFO Trigger Levels
■ Automatic Hardware (RTS/CTS) Flow Control
■ Automatic Software (Xon/Xoff) Flow Control
■ Halt and Resume Transmission Control
■ Automatic RS-485 Half-duplex Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0 and 1.1) Encoder/
Decoder
■ Automatic sleep mode (< 30 uA at 3.3V)
■ General Purpose I/Os
■ Full modem interface
• Crystal oscillator (up to 24MHz) or external clock
(up to 64MHz) input
• 32-QFN and 28-TSSOP packages
FIGURE 1. XR20M1172 BLOCK DIAGRAM
VCC
EN IR#
E N 485#
IR Q #
RESET#
SDA
SCK
A 0/ C S #
A1/SI
SO
I2C/ S P I#
1.62 V – 3.63V
I² C / S P I
Interface
C rystal
Osc /
B u ffe r
Channel 1
UART
Regs
64 Byte
TX FIFO
64 Byte
RX FIFO
BRG
G PIO s
UART Channel 2
(S im ilar to C hannel1)
TXA
RXA
RTSA#
CTSA#
G P IO [7:0]
TXB
RXB
RTSB#
CTSB#
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com