XR16V2652_07 Datasheet, PDF (1/48 Pages) Exar Corporation – HIGH PERFORMANCE DUART WITH 32-BYTE FIFO

XR16V2652
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
MAY 2007
REV. 1.0.2
GENERAL DESCRIPTION
The XR16V2652¹ (V2652) is a high performance dual
universal asynchronous receiver and transmitter
(UART) with 32 byte TX and RX FIFOs. The device
operates from 2.25 to 3.6 volts with 5 Volt tolerant
inputs and is pin-to-pin compatible to Exar’s
ST16C2552, XR16L2552, XR16V2552 and
XR16L2752. The V2652 register set is compatible to
the ST16C2552 and the XR16V2552. It supports the
Exar’s enhanced features of selectable FIFO trigger
level, automatic hardware (RTS/CTS) and software
flow control and a complete modem interface.
Onboard registers provide the user with operational
status and data error flags. An internal loopback
capability allows system diagnostics. Independent
programmable baud rate generators are provided in
each channel to select data rates up to 16 Mbps at
3.3 Volt with 4X sampling clock. The V2652 is
available in 44-pin PLCC and 32-pin QFN packages.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
• Portable Appliances
• Telecommunication Network Routers
• Ethernet Network Routers
• Cellular Data Devices
• Factory Automation and Process Controls
FEATURES
• 2.25 to 3.6 Volt Operation
• 5 Volt Tolerant Inputs
• Pin-to-pin compatible to Exar’s XR16V2752 in the
44-PLCC package
• Two independent UART channels
■ Register set compatible to ST16C2552
■ Data rate of up to 16 Mbps at 3.3 V and
12.5 Mbps at 2.5 V with 4X sampling rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 32 bytes
■ Selectable TX and RX FIFO Trigger Levels
■ Automatic Hardware (RTS/CTS) Flow Control
■ Automatic Software (Xon/Xoff) Flow Control
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode
■ Full modem interface
• Alternate Function Register
• Device Identification and Revision
• Crystal oscillator or external clock input
• Crystal oscillator (up to 32 MHz) or external clock
(up to 64 MHz) input
• 44-PLCC and 32-QFN packages
FIGURE 1. XR16V2652 BLOCK DIAGRAM
A2:A0
D7:D0
IOR#
IOW#
CS#
CHSEL
INTA
INTB
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
Reset
8-bit Data
Bus
Interface
* 5 Volt Tolerant Inputs
UART Channel A
UART
Regs
BRG
32 Byte TX FIFO
TX & RX
IR
ENDEC
32 Byte RX FIFO
UART Channel B
(same as Channel A)
Crystal Osc/Buffer
2.25 to 3.6 Volt VCC
GND
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
XTAL1
XTAL2
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com