DAN-173 Datasheet, PDF (1/3 Pages) Exar Corporation – UPGRADING FROM XR88C681 TO XR88C92/192

DATA COMMUNICATIONS APPLICATION NOTE
DAN173
JANUARY 2004
UPGRADING FROM XR88C681 TO XR88C92/192
Author: BL
1.0 INTRODUCTION
This application note describes the hardware and firmware differences between the XR88C681 and the
XR88C92/192 as well as the steps involved in upgrading the XR88C681 to the newer XR88C92/192. In this
note, the XR88C681 will be referred to as the C681 device and the XR88C92, XR88C192 family of devices will
be referred to as C92/192. Also, this application note must be used along with the datasheets of these devices
for a complete understanding of the differences.
2.0 HARDWARE DIFFERENCES
2.1 PACKAGE
The C681 and the C92/192 are fully pin-to-pin compatible in the 44-PLCC package footprint only. The C681 is
also available in the 28-PDIP, 40-PDIP and 40-CDIP packages. The C92/192 is also available in a 44-TQFP
package.
2.2 OPERATING VOLTAGE
The C681 is a 5V device only. The C92/192 can operate from 2.97 to 5.5V and it also has 5V tolerant inputs.
2.3 CRYSTAL OSCILLATOR
The max frequency of the input clock is only 7.372MHz for the C681, whereas it is 24MHz for the C92/192 at
5V VCC.
2.4 FIFO DEPTH
The C681 has 3-byte RX and TX FIFOs whereas the C92 has 8-byte FIFOs and the C192 has 16-byte FIFOs.
3.0 FIRMWARE DIFFERENCES
In the following discussion, the firmware differences are briefly explained. Please refer to the datasheets of the
XR88C681 and the XR88C92/192 for more details. The internal registers are very similar in the C681 and the
C92/192. Table 1 below shows the differences:
TABLE 1: INTERNAL REGISTERS OF XR88C681 VS. XR88C92/192
ADDRESS
A3:A0
MODE
XR88C681 REGISTER
XR88C92/192 REGISTER
COMMENTS
0000
0010
1000
1100
R/W Mode Registers A (MR1, MR2) Mode Registers A (MR0, MR1, MR2) Extra register in C92/192
R Masked Interrupt Status Reg (MISR)
Reserved
R/W Mode Registers B (MR1, MR2) Mode Registers B (MR0, MR1, MR2) Extra register in C92/192
R/W Interrupt Vector Register (IVR) General Purpose Register (GPR)
3.1 MODE REGISTERS MR0A, MR0B:
The MR0A, MR0B registers add the following functionality to the C92/192:
Bit-7: Watchdog Timer (See datasheet for details)
Bit-6: RX Trigger Level (Go to page 2 for details)
Bits 5,4: TX Trigger Level (Go to page 2 for details)
Bit 3,1: Reserved (Bit-1 is used for factory test mode)
Bits 2,1 of MR0A: Extended baud rate tables (See datasheet for details); bits 2,1 of MR0B are reserved
3.2 INTERRUPT VECTOR REGISTER (IVR):
In the special Z-mode, the XR88C681 uses this register for placing the interrupt vector. In the I-mode, this reg-
ister is a General Purpose Register (GPR). This register is a GPR in the C92/192 which supports only the I-
mode and does not support the Z-mode.
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