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EM68B16CWPA Datasheet, PDF (7/59 Pages) Etron Technology, Inc. – 32M x 16 bit DDRII Synchronous DRAM (SDRAM)
EtronTech
EM68B16CWPA
Operation Mode
Table 4 shows the truth table for the operation commands.
Table 4. Truth Table (Note (1), (2))
Command
State CKEn-1 CKEn UDM LDM BA0,1 A10 A0-9, 11-12 CS# RAS# CAS# WE#
BankActivate
Idle(3)
H
H X X V Row address L
L
H
H
Single Bank Precharge
Any
H
H X X VL
X
L
L
H
L
All Banks Precharge
Any
H
H X X XH
X
L
L
H
L
Write
Active(3) H
H
X
X
V
L
Column
L
H
L
L
address
Write with AutoPrecharge
Active(3) H
H
X
X
V
H (A0 – A9)
L
H
L
L
Read
Active(3) H
H
X
X
V
L
Column
L
H
L
H
address
Read and Autoprecharge
Active(3) H
H
X
X
V
H (A0 – A9)
L
H
L
H
(Extended) Mode Register Set Idle
H HXXV
OP code
L
L
L
L
No-Operation
Any
H
X X X XX
X
L
H
H
H
Burst Stop
Active(4) H
X X X XX
X
L
H
H
L
Device Deselect
Any
H
X X X XX
X
H
X
X
X
Refresh
Idle
H
H X X XX
X
L
L
L
H
SelfRefresh Entry
Idle
H
L X X XX
X
L
L
L
H
SelfRefresh Exit
Idle
L
H X X XX
X
H
X
X
X
L
H
H
H
Power Down Mode Entry
Idle
H
L X X XX
X
H
X
X
X
L
H
H
H
Power Down Mode Exit
Any
L
H X X XX
X
H
X
X
X
L
H
H
H
Data Input Mask Disable
Active H
X
L
L
XX
X
X
X
X
X
Data Input Mask Enable(5)
Active H
X H H XX
X
X
X
X
X
NOTE 1: V=Valid data, X=Don't Care, L=Low level, H=High level
NOTE 2: CKEn signal is input level when commands are provided.
NOTE 3: CKEn-1 signal is input level one clock cycle before the commands are provided.
NOTE 4: These are states of bank designated by BA signal.
NOTE 5: Device state is 4, and 8 burst operation.
NOTE 6: LDM and UDM can be enabled respectively.
Etron Confidential
7
Rev. 1.4
Mar. 2009