EM636327 Datasheet, PDF (52/78 Pages) Etron Technology, Inc. – 512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)

EtronTech
EM636327
Figure 14.2. Interleaving Column Read Cycle (Burst Length=4, CAS# Latency=2)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK2
CKE
CS#
RAS#
CAS#
WE #
DSF
BS
A9
RAx
RAx
A0~A8
DQM
RAx
CAy
RAx
CBw
CBx
CBy
CAy
CBz
tRCD
tAC2
DQ ^Hi-Z
Ax0 Ax1 Ax2 Ax3 Bw0 Bw1 Bx0 Bx1 By0 By1 Ay0 Ay1 Bz0 Bz1 ^{Bz2 Bz3}
Activate
Command
Bank A
Read
Command
Bank A
Activate
Command
Bank B
Read
Read
Command Command
Bank B
Bank B
Read
Command
Bank B
Read
Command
Bank A
Read
Command
Bank B
Precharge
Command
Bank A
Precharge
Command
Bank B
Preliminary
52
December 1998