EM639325TS-5IG Datasheet, PDF (1/47 Pages) Etron Technology, Inc. – 4M x 32 bit Synchronous DRAM (SDRAM)

EtronTech
EM639325
4M x 32 bit Synchronous DRAM (SDRAM)
Advance (Rev. 2.1, Aug. /2015)
Features
• ^{Fast access time from clock: 5/5.4/5.4 ns}
• ^{Fast clock rate: 200/166/143 MHz}
• ^{Fully synchronous operation}
• ^{Internal pipelined architecture}
• ^{Four internal banks (1M x 32-bit x 4bank)}
• ^{Programmable Mode}
- CAS Latency: 2 or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: Sequential & Interleaved
- Burst-Read-Single-Write
• ^{Burst stop function}
• ^{Individual byte controlled by DQM0-3}
• ^{Auto Refresh and Self Refresh}
• ^{4096 refresh cycles/64ms}
• ^{Single 3.3V ±0.3V power supply}
• ^{Industrial Temperature: T}A ^{= -40~85°C}
• ^{Interface: LVTTL}
• ^{86-pin 400 mil plastic TSOP II package}
- Pb free and Halogen free
• ^{90-ball 8 x 13 x 1.2mm FBGA package}
- Pb and Halogen Free
Overview
The EM639325 SDRAM is a high-speed CMOS
synchronous DRAM containing 128 Mbits. It is
internally configured as a quad 1M x 32 DRAM with
a synchronous interface (all signals are registered
on the positive edge of the clock signal, CLK). Each
of the 1M x 32 bit banks is organized as 4096 rows
by 256 columns by 32 bits. Read and write accesses
to the SDRAM are burst oriented; accesses start at a
selected location and continue for a programmed
number of locations in a programmed sequence.
Accesses begin with the registration of a BankActivate
command which is then followed by a Read or Write
command.
The EM639325 provides for programmable Read
or Write burst lengths of 1, 2, 4, 8, or full page, with
a burst termination option. An auto precharge
function may be enabled to provide a self-timed row
precharge that is initiated at the end of the burst
sequence. The refresh functions, either Auto or Self
Refresh are easy to use. By having a programmable
mode register, the system can choose the most
suitable modes to maximize its performance. These
devices are well suited for applications requiring
high memory bandwidth.
Table 1. Key Specifications
EM639325
tCK3 Clock Cycle time(min.)
tAC3 _{Access time from CLK (max.)}
tRAS Row Active time(min.)
tRC Row Cycle time(min.)
-5I/6I/7I
5/6/7
ns
5/5.4/5.4
ns
40/42/42
ns
55/60/63
ns
Table 2. Ordering Information
Part Number
Frequency
EM639325TS-5IG
200MHz
EM639325TS-6IG
166MHz
EM639325TS-7IG
143MHz
EM639325BK-5IH
200MHz
EM639325BK-6IH
166MHz
EM639325BK-7IH
143MHz
TS: indicates TSOP II Package
BK: indicates 8 x 13 x 1.2mm FBGA Package
I: indicates Industrial Grade
G: indicates Pb and Halogen Free for TSOP II Package
H: indicates Pb and Halogen Free for FBGA Package
Package
TSOP II
TSOP II
TSOP II
FBGA
FBGA
FBGA
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: [phone] FAX: [phone]
Etron Technology, Inc. reserves the right to change products or specification without notice.