EM638165TS-5G Datasheet, PDF (1/53 Pages) Etron Technology, Inc. – 4M x 16 bit Synchronous DRAM (SDRAM)

EtronTech
EM638165
4M x 16 bit Synchronous DRAM (SDRAM)
Preliminary (Rev. 5.3, Dec. /2013)
Features
• ^{Fast access time from clock: 4.5/5.4/5.4 ns}
• ^{Fast clock rate: 200/166/143 MHz}
• ^{Fully synchronous operation}
• ^{Internal pipelined architecture}
• ^{1M word x 16-bit x 4-bank}
• ^{Programmable Mode registers}
- CAS Latency: 2 or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: Sequential or Interleaved
- Burst stop function
- Optional drive strength control
• ^{Auto Refresh and Self Refresh}
• ^{4096 refresh cycles/64ms}
• ^{CKE power down mode}
• ^{Single +3.3V ± 0.3V power supply}
• ^{Operating Temperature: TA = 0~70°C}
• ^{Interface: LVTTL}
• 54-pin 400 mil plastic TSOP II package
- Pb and Halogen Free
• ^{54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package}
- Pb free and Halogen free
Overview
The EM638165 SDRAM is a high-speed CMOS
synchronous DRAM containing 64 Mbits. It is
internally configured as 4 Banks of 1M word x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal,
CLK). Read and write accesses to the SDRAM are
burst oriented; accesses start at a selected location
and continue for a programmed number of locations
in a programmed sequence. Accesses begin with the
registration of a Bank Activate command which is
then followed by a Read or Write command.
The EM638165 provides for programmable Read
or Write burst lengths of 1, 2, 4, 8, or full page, with a
burst termination option. An auto precharge function
may be enabled to provide a self-timed row precharge
that is initiated at the end of the burst sequence. The
refresh functions, either Auto or Self Refresh are easy
to use. By having a programmable mode register, the
system can choose the most suitable modes to
maximize its performance. These devices are well
suited for applications requiring high memory
bandwidth and particularly well suited to high
performance PC applications.
Table1. Key Specifications
EM638165
tCK3 _{Clock Cycle time(min.)}
tAC3 _{Access time from CLK(max.)}
tRAS _{Row Active time(min.)}
tRC _{Row Cycle time(min.)}
- 5/6/7
5/6/7 ns
4.5/5.4/5.4 ns
40/42/42 ns
55/60/63 ns
Table 2. Ordering Information
Part Number Frequency
Package
EM638165TS -5G 200MHz
TSOP II
EM638165TS -6G 166MHz
TSOP II
EM638165TS -7G 143MHz
TSOP II
EM638165BM -5H 200MHz
FBGA
EM638165BM -6H 166MHz
FBGA
EM638165BM -7H 143MHz
FBGA
TS: indicates TSOPII Package
BM: indicates FBGA package
G: indicates Pb and Halogen Free for TSOPII Package
H: indicates Pb free and Halogen free
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: [phone] FAX: [phone]
Etron Technology, Inc. reserves the right to change products or specification without notice.