NUC100LC1DN Datasheet, PDF (9/107 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

NUC100/120xxxDN
2 FEATURES
The equipped features are dependent on the product line and their sub products.
2.1 NuMicro^® NUC100 Features – Advanced Line
 ARM^® Cortex^® -M0 core
– Runs up to 50 MHz
– One 24-bit system timer
– Supports low power sleep mode
– Single-cycle 32-bit hardware multiplier
– NVIC for the 32 interrupt inputs, each with 4-levels of priority
– Serial Wire Debug supports with 2 watchpoints/4 breakpoints
 Built-in LDO for wide operating voltage ranged from 2.5 V to 5.5 V
 Flash Memory
– 32/64/128 Kbytes Flash for program code
– 4 KB flash for ISP loader
– Supports In-System-Program (ISP) and In-Application-Program (IAP) application code
update
– 512 byte page erase for flash
– Configurable Data Flash address and size for 128 KB system, fixed 4 KB Data Flash
for the 32 KB and 64 KB system
– Supports 2-wired ICP update through SWD/ICE interface
– Supports fast parallel programming mode by external programmer
 SRAM Memory
– 4/8/16 Kbytes embedded SRAM
– Supports PDMA mode
 PDMA (Peripheral DMA)
– Supports 9 channels PDMA for automatic data transfer between SRAM and
peripherals
– Supports CRC calculation with four common polynomials, CRC-CCITT, CRC-8, CRC-
16 and CRC-32
 Clock Control
– Flexible selection for different applications
– Built-in 22.1184 MHz high speed oscillator for system operation
 Trimmed to ±1 % at +25 ℃ and V_DD = 5 V
 Trimmed to ±3 % at -40 ℃ ~ +85 ℃ and V_DD = 2.5 V ~ 5.5 V
– Built-in 10 kHz low speed oscillator for Watchdog Timer and Wake-up operation
– Supports one PLL, up to 50 MHz, for high performance system operation
– External 4~24 MHz high speed crystal input for precise timing operation
– External 32.768 kHz low speed crystal input for RTC function and low power system
operation
 GPIO
– Four I/O modes:
 Quasi-bidirectional
 Push-pull output
 Open-drain output
 Input only with high impendence
– TTL/Schmitt trigger input selectable
– I/O pin configured as interrupt source with edge/level setting
 Timer
Mar. 02, 2017
Page 9 of 107
Rev 1.02