NUC100LC1DN Datasheet, PDF (53/107 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

NUC100/120xxxDN
After chip enters power down, the following wake-up sources can wake chip up to normal mode.
Wake-Up
Source
Wake-Up Condition System Can Enter Power-Down Mode Again Condition*
BOD
Brown-Out Detector Interrupt After software writes 1 to clear BOD_INTF (BODCR[4]).
GPIO
GPIO Interrupt
After software write 1 to clear the ISRC[n] bit.
TIMER
Timer Interrupt
After software writes 1 to clear TWF (TISRx[1]) and TIF (TISRx[0]).
WDT
WDT Interrupt
After software writes 1 to clear WTWKF (WTCR[5]) (Write Protect).
RTC
Alarm Interrupt
After software writes 1 to clear AIF (RIIR[0]).
Time Tick Interrupt After software writes 1 to clear TIF (RIIR[1]).
UART
I²C
nCTS wake-up
Addressing I²C device
After software writes 1 to clear DCTSF (UA_MSR[0]).
After software writes 1 to clear WKUPIF (I2CWKUPSTS[0]).
USB
Remote Wake-up
After software writes 1 to clear BUS_STS (USBD_INTSTS[0]).
*User needs to wait this condition before setting PWR_DOWN_EN (PWRCON[7]) and execute WFI to enter Power-down mode.
Table 6-4*User needs to wait this condition before setting PWR_DOWN_EN (PWRCON[7]) and execute WFI to enter Power-
down mode.
Table 6-4 lists the condition about how to enter Power-down mode again for each peripheral.
Wake-Up
Source
Wake-Up Condition System Can Enter Power-Down Mode Again Condition*
BOD
Brown-Out Detector Interrupt After software writes 1 to clear BOD_INTF (BODCR[4]).
GPIO
GPIO Interrupt
After software write 1 to clear the ISRC[n] bit.
TIMER
Timer Interrupt
After software writes 1 to clear TWF (TISRx[1]) and TIF (TISRx[0]).
WDT
WDT Interrupt
After software writes 1 to clear WTWKF (WTCR[5]) (Write Protect).
RTC
Alarm Interrupt
After software writes 1 to clear AIF (RIIR[0]).
Time Tick Interrupt After software writes 1 to clear TIF (RIIR[1]).
UART
I²C
nCTS wake-up
Addressing I²C device
After software writes 1 to clear DCTSF (UA_MSR[0]).
After software writes 1 to clear WKUPIF (I2CWKUPSTS[0]).
USB
Remote Wake-up
After software writes 1 to clear BUS_STS (USBD_INTSTS[0]).
*User needs to wait this condition before setting PWR_DOWN_EN (PWRCON[7]) and execute WFI to enter Power-down mode.
Table 6-4 Condition of Entering Power-down Mode Again
6.2.4 System Power Distribution
In this chip, the power distribution is divided into three segments.
 Analog power from AVDD and AVSS provides the power for analog components
operation.
 Digital power from VDD and VSS supplies the power to the internal regulator which
provides a fixed 1.8 V power for digital operation and I/O pins.
Mar. 02, 2017
Page 53 of 107
Rev 1.02