T-51513D104J-FW-A-AD Datasheet, PDF (8/17 Pages) List of Unclassifed Manufacturers – LCD Module Technical Specification

6. INTERFACE TIMING
(1) Timing Specifications
ITEM
SYMBOL MIN.
TYP.
MAX.
UNIT
Frequency
DCLK
Period
Low Width
High Width
DATA _{Set up time}
(R,G,B,DENA
HD, VD) Hold time
fCLK
--
25
tCLK
34.5
40
tWCL
12
--
tWCH
12
--
tDS
5
--
tDH
5
--
29
MHz
--
ns
--
ns
--
ns
--
ns
--
ns
Horizontal Active Time tHA
640
640
640
tCLK
Horizontal Front Porch tHFP
10
16
--
tCLK
Horizontal Back Porch tHBP
2
138
--
tCLK
DENA _{Vertical Active Time}
tVA
480
480
480
tH
Vertical Front Porch
tVFP
1
13
--
tH
Vertical Back Porch
tVBP
2
33
--
tH
Frequency
fH
27
31.5
38
kHz
HD
Period
tH
26.3
31.7
37.0
µs
Low Width
tWHL
5
96
--
tCLK
Frequency
fV
55
60
70
Hz
VD
Period
tV
14.3
16.7
18.2
ms
[Note]
Low Width
tWVL
3
--
--
tH
1) DATA is latched at fall edge of DCLK in this specification.
2) Polarities of HD and VD are negative in this specification.
3) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
4) DCLK should appear during all invalid period, and HD should appear during invalid period of
frame cycle.
5) tHFP + tHBP ≥ 20 tCLK
T-51513D104J-FW-A-AD (AD) No. 2004-0193
OPTREX CORPORATION
Page 8/32