WA04X330JTL Datasheet, PDF (7/9 Pages) List of Unclassifed Manufacturers – General purpose chip resistors array

Approval sheet
TEST AND REQUIREMENTS(JIS C 5201-1 : 1998)
Essentially all tests are carried out according to the schedule of IEC publication 115-8, category
LCT/UCT/56(rated temperature range : Lower Category Temperature, Upper Category Temperature; damp
heat, long term, 56 days). The testing also meets the requirements specified by EIA, EIAJ and JIS.
The tests are carried out in accordance with IEC publication 68, "Recommended basic climatic and mechanical
robustness testing procedure for electronic components" and under standard atmospheric conditions according
to IEC 60068-1, subclause 5.3. Unless otherwise specified, the following value supplied :
Temperature: 15°C to 35°C.
Relative humidity: 45% to 75%.
Air pressure: 86kPa to 106 kPa (860 mbar to 1060 mbar).
All soldering tests are performed with midly activated flux.
TEST
DC resistance
Clause 4.5
Temperature Coefficient
of Resistance (T.C.R)
Clause 4.8
Short time overload
(S.T.O.L)
Clause 4.13
Resistance to soldering
heat(R.S.H)
Clause 4.18
Solderability
Clause 4.17
Temperature cycling
Clause 4.19
Load life (endurance)
Clause 4.25
Load life in Humidity
Clause 4.24
Adhesion
Clause 4.32
Insulation Resistance
Clause 4.6
Dielectric Withstand
Voltage
Clause 4.7
PROCEDURE
REQUIREMENT
Resistor
Jumper
DC resistance values measured at the test voltages specified below :
Within the specified
< 50mΩ
<10Ω@0.1V,<100Ω@0.3V,<1KΩ@1.0V,<10KΩ@3V, <100KΩ@10V, tolerance
<1MΩ@25V, <10MΩ@30V
Natural resistance change per change in degree centigrade.
( ) ^{R2 − R1 ×106 (ppm/°C)}
R₁ t₂ − t₁
t₁ : 20°C+5°C-1°C
Refer to
N/a
“QUICK REFERENCE DATA”
R₁ : Resistance at reference temperature
R₂ : Resistance at test temperature
Permanent resistance change after a 5second application of a ∆R/R max. ±(2%+0.10Ω)
< 50mΩ
voltage 2.5 times RCWV or the maximum overload voltage specified
in the above list, whichever is less.
Un-mounted chips completely immersed for 10±1second in a SAC ^{ΔR/R max. ±(1%+0.05Ω)}
solder bath at 260℃±5ºC
no visible damage
< 50mΩ
Un-mounted chips completely immersed for 2±0.5 second in a SAC good tinning (>95% covered)
solder bath at 235℃±5℃
no visible damage
30 minutes at -55°C±3°C, 2~3 minutes at 20°C+5°C-1°C, 30 ^{ΔR/R max. ±(1%+0.05Ω)}
minutes at +155°C±3°C, 2~3 minutes at 20°C+5°C-1°C, total 5 no visible damage
continuous cycles
1000 +48/-0 hours, loaded with RCWV or Vmax in chamber ΔR/R max.±(3%+0.10Ω)
controller 70±2ºC, 1.5 hours on and 0.5 hours off
For 10Ω≤R<1MΩ ;
ΔR/R max.±(5%+0.10Ω)
< 50mΩ
< 50mΩ
1000 +48/-0 hours, loaded with RCWV or Vmax in humidity chamber
controller at 40°C±2°C and 90~95% relative humidity, 1.5hours on
and 0.5 hours off
For R<10Ω, R≥1MΩ
ΔR/R max.±(3%+0.10Ω)
For 10Ω≤R<1MΩ ;
ΔR/R max.±(5%+0.10Ω)
< 50mΩ
Pressurizing force: 5N, Test time: 10±1sec.
Apply the maximum overload voltage (DC) for 1minute
For R<10Ω, R≥1MΩ
No remarkable damage or removal of
the terminations.
R≧10GΩ
Apply the maximum overload voltage (AC) for 1 minute
No breakdown or flashover
Page 7 of 9
ASC_WA04/06_V15
Oct.2010