UG-2828GDEDF11 Datasheet, PDF (6/26 Pages) List of Unclassifed Manufacturers – Product Specification

WiseChip Semiconductor Inc.
Doc. No: SAS1-0D038-A
1.5 Pin Definition
Pin Number Symbol
Power Supply
27
VCI
26
VDD
4
VDDIO
28
2
Driver
22
3
VSS
VCC
IREF
VCOMH
5
VSL
External IC Control
24
GPIO0
23
GPIO1
Interface
17
BS0
18
BS1
21
RES#
19
CS#
20
D/C#
I/O
Function
Power Supply for Operation
P This is a voltage supply pin. It must be connected to external source & always be
equal to or higher than VDD & VDDIO.
Power Supply for Core Logic Circuit
P This is a voltage supply pin which is regulated internally from VCI. A capacitor
should be connected between this pin & VSS under all circumstances.
Power Supply for I/O Pin
This pin is a power supply pin of I/O buffer. It should be connected to VCI or
P external source. All I/O signal should have VIH reference to VDDIO. When I/O
signal pins (BS0~BS1, D0~D7, control signals…) pull high, they should be
connected to VDDIO.
Ground of Logic Circuit
P This is a ground pin. It also acts as a reference for the logic pins. It must be
connected to external ground.
Power Supply for OEL Panel
P This is the most positive voltage supply pin of the chip. It must be connected to
external source.
Current Reference for Brightness Adjustment
I This pin is segment current reference pin. A resistor should be connected
between this pin and VSS. Set the current at 12.5µA maximum.
Voltage Output High Level for COM Signal
P This pin is the input pin for the voltage output high level for COM signals. A
tantalum capacitor should be connected between this pin and VSS.
Voltage Output Low Level for SEG Signal
P
This is segment voltage reference pin.
External VSL is set as default. This pin has to connect with resistor and diode to
ground.
General Purpose Input/Output
I/O
This pin could be left open individually or has signal inputted/outputted. It is able
to use as the external DC/DC converter circuit enabled/disabled control or other
applications.
Communicating Protocol Select
These pins are MCU interface selection input. See the following table:
BS0
BS1
I
3-wire SPI
4-wire SPI
1
0
0
0
8-bit 68XX Parallel
1
1
8-bit 80XX Parallel
0
1
Power Reset for Controller and Driver
I This pin is reset signal input. When the pin is low, initialization of the chip is
executed. Keep this pin pull high during normal operation.
Chip Select
I This pin is the chip select input. The chip is enabled for MCU communication only
when CS# is pulled low.
Data/Command Control
This pin is Data/Command control pin. When the pin is pulled high, the input at
D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0
will be transferred to the command register.
I
When the pin is pulled high and serial interface mode is selected, the data at SDIN
is treated as data. When it is pulled low, the data at SDIN will be transferred to
the command register.
When 3-wire serial mode is selected, this pin must be connected to VSS.
For detail relationship to MCU interface signals, please refer to the Timing
Characteristics Diagrams.
http://www.wisechip.com.tw
4D Systems Pty Ltd
3
www.4dsystems.com.au