MINI58LDE Datasheet, PDF (53/83 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

MINI58DE
6.7 Enhanced PWM Generator
6.7.1 Overview
The NuMicro^® Mini58 series has built in one PWM unit (PWM0) which is specially designed for
motor driving control applications. The PWM0 supports six PWM generators which can be
configured as six independent PWM outputs, PWM0_CH0~PWM0_CH5, or as three
complementary PWM pairs, (PWM0_CH0, PWM0_CH1), (PWM0_CH2, PWM0_CH3) and
(PWM0_CH4, PWM0_CH5) with three programmable dead-time generators.
Every complementary PWM pairs share one 8-bit prescaler. There are six clock dividers providing
five divided frequencies (1, 1/2, 1/4, 1/8, 1/16) for each channel. Each PWM output has
independent 16-bit counter for PWM period control, and 16-bit comparators for PWM duty control.
The six PWM generators provide twelve independent PWM interrupt flags which are set by
hardware when the corresponding PWM period counter comparison matched period and duty.
Each PWM interrupt source with its corresponding enable bit can request PWM interrupt. The
PWM generators can be configured as One-shot mode to produce only one PWM cycle signal or
Auto-reload mode to output PWM waveform continuously.
To prevent PWM driving output pin with unsteady waveform, the 16-bit period down counter and
16-bit comparator are implemented with double buffer. When user writes data to
counter/comparator buffer registers, the updated value will be loaded into the 16-bit down
counter/ comparator at the end of current period. The double buffering feature avoids glitch at
PWM outputs.
Besides PWM, Motor controlling also need Timer, ACMP and ADC to work together. In order to
control motor more precisely, we provide some registers that not only configure PWM but also
Timer, ADC and ACMP, by doing so, it can save more CPU time and control motor with ease
especially in BLDC.
6.7.2 Features
The PWM0 supports the following features:
 Six independent 16-bit PWM duty control units with maximum six port pins:
 Six independent PWM outputs – PWM0_CH0, PWM0_CH1, PWM0_CH2,
PWM0_CH3, PWM0_CH4, and PWM0_CH5
 Three complementary PWM pairs, with each pin in a pair mutually complement
to each other and capable of programmable dead-time insertion – (PWM0_CH0,
PWM0_CH1), (PWM0_CH2, PWM0_CH3) and (PWM0_CH4, PWM0_CH5)
 Three synchronous PWM pairs, with each pin in a pair in-phase – (PWM0_CH0,
PWM0_CH1), (PWM0_CH2, PWM0_CH3) and (PWM0_CH4, PWM0_CH5)
 Group control bit – PWM0_CH2 and PWM0_CH4 are synchronized with PWM0_CH0,
PWM0_CH3 and PWM0_CH5 are synchronized with PWM0_CH1
 One-shot (only support edge-aligned type) or Auto-reload mode PWM
 Up to 16-bit resolution
 Supports edge-aligned, center-aligned and precise center-aligned mode
 Supports asymmetric PWM generating in center-aligned and precise center-aligned
mode
 Supports center loading in center-aligned and precise center-aligned mode
 Programmable dead-time insertion between complementary paired PWMs
Dec. 09, 2015
Page 53 of 83
Rev.1.02