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ISD9300 Datasheet, PDF (5/26 Pages) List of Unclassifed Manufacturers – ISD Cortex-M0 ChipCorder | |||
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ISD9300 Datasheet
â Programmable gain amplifier with 32 steps from -12 to 35.25dB in 0.75dB steps.
â Boost gain stage of 26dB, giving maximum total gain of 61dB.
â Input selectable from dedicated MIC pins or analog enabled GPIO.
â Programmable biquad filter to support multiple sample rates from 8-32kHz.
â DMA support for minimal CPU intervention.
ï· Differential Audio PWM Output (DPWM)
â Direct connection of speaker
â 1W drive capability into 8⦠load.
â High efficiency 88%
â Configurable up-sampling to support sample rates from 8-32kHz.
â DMA support for minimal CPU intervention.
ï· Timers
â Two timers with 8-bit pre-scaler and 24-bit resolution.
â Counter auto reload.
ï· Watch Dog Timer
â Default ON/OFF by configuration setting
â Multiple clock sources
â 8 selectable time out period from micro seconds to seconds (depending on clock source)
â WDT can wake up sleep.
â Interrupt or reset selectable on watchdog time-out.
ï· RTC
â Real Time Clock counter (second, minute, hour) and calendar counter (day, month, year)
â Alarm registers (second, minute, hour, day, month, year)
â Selectable 12-hour or 24-hour mode
â Automatic leap year recognition
â Time tick and alarm interrupts.
â Device wake up function.
â Supports software compensation of crystal frequency by compensation register (FCR)
ï· PWM/Capture
â Six 16-bit PWM generators provide six single ended PWM outputs or three complementary
paired PWM outputs.
â The PWM generator equipped with a clock source selector, a clock divider, an 8-bit pre-scaler
and Dead-Zone generator for complementary paired PWM.
â PWM interrupt synchronous to PWM period.
â 16-bit digital Capture timers (shared with PWM timers) provide rising/falling capture inputs.
â Support Capture interrupt
ï· UART
â UART ports with flow control (TX, RX, CTS and RTS)
â 8-byte FIFO.
â Support IrDA (SIR) and LIN function
â Programmable baud-rate generator up to 1/16 of system clock.
ï· SPI
â SPI clock up to 24MHz.
â SPI data rate in Quad mode up to 98Mbps.
â Support MICROWIRE/SPI master/slave mode (SSP)
â Full duplex synchronous serial data transfer
â Variable length of transfer data from 1 to 4 bytes.
â MSB or LSB first data transfer
â 2 slave/device select lines when used in master mode.
â Hardware CRC calculation module available for CRC calculation of data stream.
â DMA support for burst transfers.
â Dual/Quad SPI support.
Release Date: Oct 23, 2014
-5-
Revision V1.1
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