ISD9300 Datasheet, PDF (11/26 Pages) List of Unclassifed Manufacturers – ISD Cortex-M0 ChipCorder

ISD9300 Datasheet
Pin No.
LQFP
64
Pin Name
SPI_SSB1
PA.4
40
I2S_FS
PB.13
SPI_MOSI1
41
PWM5
PWM4B
PA.3
42
SPI_MISO0
I2C_SDA
PA.2
43
SPI_SSB0
44
VDD33
PB.12
SPI_MISO1
45
PWM4
PWM5B
PA.1
46
SPI_SCLK
I2C_SCL
PA.0
47
SPI_MOSI0
MCLK
48
VCCLDO
PA.14
TM0
49
SDCLK
PWM4
PA.13
50
PWM1
SPKM
Pin Type
Alt
CFG
Description
O
3 SPI Slave Select 1
I/O
0 General purpose input/output pin; Port A, bit 4
I/O
1 I2S Frame Sync
I/O
0 General purpose input/output pin; Port B, bit 13.
O
1 SPI Channel 1 Master Out, Slave In
O
2 PWM5 Output
O
3 PWM Channel 4 Complementary Output
I/O
0 General purpose input/output pin; Port A, bit 3
I
1 SPI Channel 0 Master In, Slave Out
I/O
2 I2C Serial Data
I/O
0 General purpose input/output pin; Port A, bit 2
I/O
1 SPI Slave Select 0
P
LDO Regulator Output. If used, a 1µF capacitor must be placed
to ground. If not used then tie to VCCD.
I/O
0 General purpose input/output pin; Port B, bit 13.
O
1 Master In, Slave Out channel 1 for SPI interface
O
2 PWM4 Output
O
3 PWM channel 5 Complementary Output
I/O
0 General purpose input/output pin; Port A, bit 1
I/O
1 SPI Serial Clock
I/O
2 I2C Serial Clock
I/O
0 General purpose input/output pin; Port A, bit 2
O
1 SPI Channel 0 Master Out, Slave In
O
2 Master clock output.
P
Power Supply for LDO, should be connected to VCCD
I/O
0 General purpose input/output pin; Port A, bit 14
I
1 External input to Timer 0
O
2 Inverse Clock output for digital microphone mode.
O
3 PWM4 Output
I/O
0 General purpose input/output pin; Port A, bit 13
O
1 PWM1 Output.
O
2 Equivalent to SPK-.
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Release Date: Oct 23, 2014
Revision V1.1