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SBN1661G_M18 Datasheet, PDF (49/52 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD Driver with 32-row x 80-column Display Data Memory
Avant Electronics SBN1661G_M18, SBN1661G_M02, SBN0080G_S18, SBN0080G_S02
Dot-matrix STN LCD Driver with 32-row x 80-column
19 APPLICATION NOTES
1. It is recommended that the following power-up sequence be followed to ensure reliable operation of your display
system. As the ICs are fabricated in CMOS and there is intrinsic latch-up problem associated with any CMOS
devices, proper power-up sequence can reduce the danger of triggering latch-up. When powering up the system,
control logic power must be powered on first. When powering down the system, control logic must be shut off later
than or at the same time with the LCD bias (VEE).
VDD
Signal
VEE
5V
0V
0~50 ms
1 second (minimum)
0 second
(minimum)
0 second
(minimum)
1 second (minimum)
0~50 ms
-30V
Fig.35 Recommended power up/down sequence
2. The metal frame of the LCD panel should be grounded.
3. A 0.1 μF ceramic capacitor should be connected between VDD and VSS.
4. A 0.1 mF ceramic capacitor should be connected between VDD (or VSS) and each of V1, V2, V3, V4, and V5.
5. If the length of the cable connecting the host microcontroller and the LCD module is longer than 45 cm, a ceramic
capacitor of 20P~150P should be connected between VDD (or VSS) and each of the R/WR(WR), the E/RD, and the
CS.
2006 Aug 16
49 of 52
data sheet (v6.3)