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SBN1661G_M18 Datasheet, PDF (28/52 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD Driver with 32-row x 80-column Display Data Memory
Avant Electronics SBN1661G_M18, SBN1661G_M02, SBN0080G_S18, SBN0080G_S02
Dot-matrix STN LCD Driver with 32-row x 80-column
8.2 Read Display Data
The Read Display Data command starts a 3-step operation.
1. First, the current data of the internal 8-bit output latch of the Display Data Memory is read by the microcontroller, via
the 8-bit data bus DB0~DB7.
2. Then, a byte of data of the Display Data Memory is transferred to the 8-bit output latch from a location specified by
the Page Address Register and the Column Address Register,
3. Finally, the content of the Column Address Register is automatically incremented by one.
Fig. 16 shows the internal 8-bit ouptut latch located between the 8-bit I/O data bus and the Display Data Memory cell
array. Because of this internal 8-bit output latch, a dummy read is needed to obtain correct data from the Display Data
Memory.
For Display Data Write operation, a dummy write is not needed, because data can be directly written from the data bus
to internal memory cells.
(8-bit bi-directional data bus)
Read Display Data 8-bit output latch
Write Display Data
Display Data Memory cell array
( 32 row x 80 column )
Column Address Decoder
Fig.16 Read Display Data Memory
Table 29 gives the control bus setting for this command.
Table 29 The setting of the control bus for issuing Read Display Data command
C/D
E/(RD)
R/W(WR)
1
0
1
2006 Aug 16
28 of 52
data sheet (v6.3)