LM3S1960 Datasheet, PDF (444/492 Pages) List of Unclassifed Manufacturers – Microcontroller

Signal Tables
Pin Name
C1-
C1o
C2+
C2-
C2o
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
CCP6
CCP7
CMOD0
CMOD1
Fault
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA
GNDA
HIB
I2C0SCL
I2C0SDA
I2C1SCL
Pin Number
91
46
23
22
43
95
100
96
6
42
25
86
85
65
76
99
9
15
21
33
39
45
54
57
63
69
82
87
94
4
97
51
70
71
34
Pin Type
I
O
I
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
O
I/O
I/O
I/O
Buffer Type Description
Analog Analog comparator 1 negative input
TTL
Analog comparator 1 output
Analog Analog comparator positive input
Analog Analog comparator 2 negative input
TTL
Analog comparator 2 output
TTL
Capture/Compare/PWM 0
TTL
Capture/Compare/PWM 1
TTL
Capture/Compare/PWM 2
TTL
Capture/Compare/PWM 3
TTL
Capture/Compare/PWM 4
TTL
Capture/Compare/PWM 5
TTL
Capture/Compare/PWM 6
TTL
Capture/Compare/PWM 7
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
PWM Fault
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
TTL
An output that indicates the processor is in
hibernate mode.
OD
I2C module 0 clock
OD
I2C module 0 data
OD
I2C module 1 clock
444
November 30, 2007
Preliminary