LM3S1960 Datasheet, PDF (105/492 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S1960 Microcontroller
Bit/Field
8
7:6
5
4
3
2
1
0
Name
QEI0
reserved
SSI1
SSI0
reserved
UART2
UART1
UART0
Type
R/W
RO
R/W
R/W
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
QEI0 Clock Gating Control
This bit controls the clock gating for QEI module 0. If set, the unit
receives a clock and functions. Otherwise, the unit is unclocked and
disabled. If the unit is unclocked, reads or writes to the unit will generate
a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI1 Clock Gating Control
This bit controls the clock gating for SSI module 1. If set, the unit receives
a clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
SSI0 Clock Gating Control
This bit controls the clock gating for SSI module 0. If set, the unit receives
a clock and functions. Otherwise, the unit is unclocked and disabled. If
the unit is unclocked, reads or writes to the unit will generate a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UART2 Clock Gating Control
This bit controls the clock gating for UART module 2. If set, the unit
receives a clock and functions. Otherwise, the unit is unclocked and
disabled. If the unit is unclocked, reads or writes to the unit will generate
a bus fault.
UART1 Clock Gating Control
This bit controls the clock gating for UART module 1. If set, the unit
receives a clock and functions. Otherwise, the unit is unclocked and
disabled. If the unit is unclocked, reads or writes to the unit will generate
a bus fault.
UART0 Clock Gating Control
This bit controls the clock gating for UART module 0. If set, the unit
receives a clock and functions. Otherwise, the unit is unclocked and
disabled. If the unit is unclocked, reads or writes to the unit will generate
a bus fault.
November 30, 2007
105
Preliminary