FEDL9042-01 Datasheet, PDF (33/58 Pages) List of Unclassifed Manufacturers – DOT MATRIX LCD CONTROLLER DRIVER

LAPIS Semiconductor
FEDL9042-01
ML9042-xx
3) Entry Mode Setting
Instruction code:
RS1 RS0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1
0
0
0
0
0
0
0
1
I/D
S
(1) When the I/D is set, the cursor or blink shifts to the right by 1 character position (ID= “1”; increment) or to
the left by 1 character position (I/D= “0”; decrement) after an 8-bit character code is written to or read
from the DDRAM. At the same time, the address counter (ADC) is also incremented by 1 (when I/D =
“1”; increment) or decremented by 1 (when I/D = “0”; decrement). After a character pattern is written to
or read from the CGRAM, the address counter (ADC) is incremented by 1 (when I/D = “1”; increment) or
decremented by 1 (when I/D = “0”; decrement).
Also after data is written to or read from the ABRAM, the address counter (ADC) is incremented by 1
(when I/D = “1”; increment) or decremented by 1 (when I/D = “0”; decrement).
(2) When S = “1”, the cursor or blink stops and the entire display shifts to the left (I/D = “1”) or to the right
(I/D = “0”) by 1 character position after a character code is written to the DDRAM.
In the case of S = “1”, when a character code is read from the DDRAM, when a character pattern is
written to or read from the CGRAM or when data is written to or read from the ABRAM, normal
read/write is carried out without shifting of the entire display. (The entire display does not shift, but the
cursor or blink shifts to the right (I/D = “1”) or to the left (I/D = “0”) by 1 character position.)
When S = “0”, the display does not shift, but normal write/read is performed.
Note: The execution time of this instruction is 37 s (maximum) at an oscillation frequency of
270 kHz.
4) Display ON/OFF Control
RS1
RS0
R/W DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction code:
1
0
0
0
0
0
0
1
D
C
B
(1) The “D” bit (DB2) of this instruction determines whether or not to display character patterns on the LCD.
When the “D” bit is “1”, character patterns are displayed on the LCD.
When the “D” bit is “0”, character patterns are not displayed on the LCD and the cursor/blinking also
disappear.
Note: Unlike the Display Clear instruction, this instruction does not change the character code in the
DDRAM .
(2) When the “C” bit (DB1) is “0”, the cursor turns off. When both the “C” and “D” bits are “1”, the cursor
turns on.
(3) When the “B” bit (DB0) is “0”, blinking is canceled. When both the “B” and “D” bits are “1”, blinking is
performed.
In the Blinking mode, all dots including those of the cursor, the character pattern and the cursor are
alternately displayed.
Note: The execution time of this instruction is 37 s (maximum) at an oscillation frequency of
270 kHz.
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