VS1011E Datasheet, PDF(31/49 Page) List of Unclassifed Manufacturers

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VS1011E Datasheet, PDF (31/49 Pages) List of Unclassifed Manufacturers – MPEG AUDIO CODEC

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VLSI

Solution y

VS1011e

VS1011E

8. FUNCTIONAL DESCRIPTION

SM STREAM activates VS1011eâs stream mode. In this mode, data should be sent with as even intervals

as possible (and preferable with data blocks of less than 512 bytes), and VS1011e makes every attempt

to keep its input buffer half full by changing its playback speed upto 5%. For best quality sound, the

average speed error should be within 0.5%, the bitrate should not exceed 160 kbit/s and VBR should not

be used. For details, see VS10XX Application Note: Streaming.

SM DACT deï¬nes the active edge of data clock for SDI. If clear data is read at the rising edge, and if set

data is read at the falling edge.

When SM SDIORD is clear, bytes on SDI are sent as a default MSb ï¬rst. By setting SM SDIORD, the

user may reverse the bit order for SDI, i.e. bit 0 is received ï¬rst and bit 7 last. Bytes are, however, still

sent in the default order. This register bit has no effect on the SCI bus.

Setting SM SDISHARE makes SCI and SDI share the same chip select, as explained in Chapter 7.2, if

also SM SDINEW is set.

Setting SM SDINEW will activate VS1002 native serial modes as described in Chapters 7.2.1 and 7.3.2.

8.6.2 SCI STATUS (RW)

SCI STATUS contains information on the current status of VS1011e and lets the user shutdown the chip

without audio glitches.

Name

Bits Description

SS VER

6:4 Version

SS APDOWN2 3 Analog driver powerdown

SS APDOWN1 2 Analog internal powerdown

SS AVOL

1:0 Analog volume control

SS VER is 0 for VS1001, 1 for VS1011, 2 for VS1002 and VS1011e, and 3 for vs1003.

You can use SCI MODE to distinguish between VS1002 and VS1011e. After reset VS1011e has

SM SDINEW=0, while VS1002 has SM SDINEW=1.

SS APDOWN2 controls analog driver powerdown. Normally this bit is controlled by the system ï¬rmware.

However, if the user wants to powerdown VS1011e with a minimum power-off transient, turn this bit to

1, then wait for at least a few milliseconds before activating reset.

SS APDOWN1 controls internal analog powerdown. This bit is meant to be used by the system ï¬rmware

only.

SS AVOL is the analog volume control: 0 = -0 dB, 1 = -6 dB, 3 = -12 dB. This register is meant to be

used automatically by the system ï¬rmware only.

Version 1.04, 2007-10-08

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