LM3S815 Datasheet, PDF (31/423 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S815 Data Sheet
1.4.4.2
1.4.4.3
1.4.5
1.4.5.1
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs reduce CPU interrupt service loading.
The UART can generate individually masked interrupts from the RX, TX, modem status, and error
conditions. The module provides a single combined interrupt when any of the interrupts are
asserted and are unmasked.
SSI (Section 13 on page 276)
Synchronous Serial Interface (SSI) is a four-wire bi-directional communications interface.
The Stellaris SSI module provides the functionality for synchronous serial communications with
peripheral devices, and can be configured to use the Freescale SPI, MICROWIRE, or TI
synchronous serial interface frame formats. The size of the data frame is also configurable, and
can be set between 4 and 16 bits, inclusive.
The SSI module performs serial-to-parallel conversion on data received from a peripheral device,
and parallel-to-serial conversion on data transmitted to a peripheral device. The TX and RX paths
are buffered with internal FIFOs, allowing up to eight 16-bit values to be stored independently.
The SSI module can be configured as either a master or slave device. As a slave device, the SSI
module can also be configured to disable its output, which allows a master device to be coupled
with multiple slave devices.
The SSI module also includes a programmable bit rate clock divider and prescaler to generate the
output serial clock derived from the SSI module’s input clock. Bit rates are generated based on the
input clock and the maximum bit rate is determined by the connected peripheral.
I²C (Section 14 on page 311)
The Inter-Integrated Circuit (I²C) bus provides bi-directional data transfer through a two-wire
design (a serial data line SDA and a serial clock line SCL).
The I²C bus interfaces to external I²C devices such as serial memory (RAMs and ROMs),
networking devices, LCDs, tone generators, and so on. The I²C bus may also be used for system
testing and diagnostic purposes in product development and manufacture.
The Stellaris I²C module provides the ability to communicate to other IC devices over an I²C bus.
The I²C bus supports devices that can both transmit and receive (write and read) data.
Devices on the I²C bus can be designated as either a master or a slave. The I²C module supports
both sending and receiving data as either a master or a slave, and also supports the simultaneous
operation as both a master and a slave. The four I²C modes are: Master Transmit, Master
Receive, Slave Transmit, and Slave Receive.
The Stellaris I²C module can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
Both the I²C master and slave can generate interrupts. The I²C master generates interrupts when
a transmit or receive operation completes (or aborts due to an error). The I²C slave generates
interrupts when data has been sent or requested by a master.
System Peripherals
Programmable GPIOs (Section 8 on page 117)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The Stellaris GPIO module is composed of five physical GPIO blocks, each corresponding to an
individual GPIO port. The GPIO module is FiRM-compliant (compliant to the ARM Foundation IP
for Real-Time Microcontrollers specification) and supports up to 34 programmable input/output
pins. The number of GPIOs available depends on the peripherals being used (see Table 18-4 on
page 399 for the signals available to each GPIO pin).
April 28, 2007
31
Preliminary