English
Language : 

LM3S815 Datasheet, PDF (233/423 Pages) List of Unclassifed Manufacturers – Microcontroller
LM3S815 Data Sheet
Register 16: ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 1. When configuring a sample sequence, the END bit must be set at some
point, whether it be after the first sample, last sample, or any sample in between.
This register is 16-bits wide and contains information for four possible samples. This register’s bit
fields are as shown in the diagram below. Bit field definitions are the same as those in the
ADCSSCTL0 register (see page 228) but are for Sample Sequencer 1.
ADC Sample Sequence Control 1 (ADCSSCTL1)
Offset 0x064
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Type
Reset
TS3
R/W
0
IE3 END3 D3
R/W
R/W
R/W
0
0
0
TS2
R/W
0
IE2 END2 D2
R/W
R/W
R/W
0
0
0
TS1
R/W
0
IE1 END1 D1
R/W
R/W
R/W
0
0
0
TS0
R/W
0
IE0 END0 D0
R/W
R/W
R/W
0
0
0
Register 17: ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068
This register contains the conversion results for samples collected with Sample Sequencer 1.
Reads of this register return conversion result data in the order sample 0, sample 1, and so on,
until the FIFO is empty. If the FIFO is not properly handled by software, overflow and underflow
conditions are registered in the ADCOSTAT and ADCUSTAT registers.
Bit fields and definitions are the same as ADCSSFIFO0 (see page 230) but are for FIFO 1.
Register 18: ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C
This register provides a window into the Sample Sequencer FIFO 1, providing full/empty status
information as well as the positions of the head and tail pointers. The reset value of 0x100
indicates an empty FIFO.
This register has the same bit fields and definitions as ADCSSFSTAT0 (see page 231) but is for
FIFO 1.
April 28, 2007
233
Preliminary