CC1010 Datasheet, PDF (20/133 Pages) Texas Instruments – Single Chip Very Low Power RF Transceiver with 8051-Compatible Microcontroller

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SmartRF ^â CC1010
DPS (0x86) - Data Pointer Select
Bit Name
7:1 -
0 SEL
R/W Description
R0
Reserved, read as 0
R/W Data Pointer Select for external RAM access
0 : DPH0 and DPL0 are used
1 : DPH1 and DPL1 are used
MPAGE (0x92) - Memory Page Select Register
Bit Name
R/W Description
7:0 MPAGE(7:0) R/W Memory Page
A total of 119 Special Function Registers
(SFRs) are accessible from the
microcontroller core. The names and
addresses of all SFRs are listed in Table
5. All standard 8051 registers are
available, in addition to SFRs which are
CC1010 specific, controlling modules such
as the RF Transceiver, DES encryption,
ADC and Real-Time Clock.
Table 5. CC1010 SFR Overview
0xF8
0xF0
0xE8
0xE0
0xD8
0xD0
0xC8
0xC0
0xB8
0xB0
0xA8
0xA0
0x98
0x90
0x88
0x80
0/8
EIP
B
EIE
ACC
EICON
PSW
RFMAIN
SCON1
IP
P3
IE
P2
SCON0
P1
TCON
P0
1/9
TEST0
FSHAPE7
FSDELAY
CURRENT
MODEM2
X32CON
RFBUF
SBUF1
RDATA
-
TCON2
SPCR
SBUF0
EXIF
TMOD
SP
2/A
TEST1
FSHAPE6
FSEP0
PA_POW
MODEM1
WDT
FREQ_0A
RFCON
RADRL
-
T2PRE
SPDR
-
MPAGE
TL0
DPL0
3/B
TEST2
FSHAPE5
FSEP1
PLL
MODEM0
PDET
FREQ_1A
CRPCON
RADRH
-
T3PRE
SPSR
-
ADCON
TL1
DPH0
All SFRs will be described in the following
sections. A more detailed overview is
provided in Table 33 on page 126, which
also includes all reset values. SFRs with
addresses ending with 0 or 8 (leftmost
column of Table 5) are bit adressable.
4/C
TEST3
FSHAPE4
FSCTRL
LOCK
MATCH
BSYNC
FREQ_2A
CRPKEY
CRPINI4
CRPINI0
T2
P0DIR
-
ADDATL
TH0
DPL1
5/D
TEST4
FSHAPE3
RTCON
CAL
FLTIM
-
FREQ_0B
CRPDAT
CRPINI5
CRPINI1
T3
P1DIR
-
ADDATH
TH1
DPH1
6/E
TEST5
FSHAPE2
FREND
PRESCALER
-
-
FREQ_1B
CRPCNT
CRPINI6
CRPINI2
FLADR
P2DIR
-
ADCON2
CKCON
DPS
7/F
TEST6
FSHAPE1
TESTMUX
RESERVED
-
-
FREQ_2B
RANCON
CRPINI7
CRPINI3
FLCON
P3DIR
CHVER
ADTRH
-
PCON
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SmartRF^â CC1010 PRELIMINARY Datasheet (rev. 1.0) 2002-09-18
Page 20 of 133