HM17CM4096 Datasheet, PDF (19/67 Pages) List of Unclassifed Manufacturers – 128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM

HM17CM4096
(4) 16 bit data access to DDRAM
It is possible to write in DDRAM by 16-bits access with the data of 16 bits data bus D₀~D₁₅.
16 bits data access mode is possible by setting the value of WLS register to “1”.
TABEL
WLS
L
H
Access mode
8 bit
16 bit
Each command should be set to 8-bits(D₀~D₇) as well as to 16-bit access mode.
16-bit access is available at display RAM access.
(5) Display start line register
When displaying the DDRAM data, it is the contents of Y address register that is corresponding to
display start line.
The data of Y address is displayed on the display start line depending on the value of the shift
command register and the display start line register.
The data of this register are preset to the display line counter per FLM signal transition.
Line counter is counted up in synchronization with CL input and generates line address that read
out 384bit data from DDRAM to LCD driver circuit.
(6) DDRAM addressing
This IC includes display memory Bit mapped that is composed of 1,536 bit of X direction
(12bit×128) and 162bit of Y direction.
In gray mode, neighboring 4-bit data are displayed by segment driver with 16 grays, respectively.
3 outputs of segment driver compose 1 pixel of RGB and 128×162 pixels are displayed with 4096
color (16gray×16gray×16gray).
Address area of X direction is varied according to accessed data length. The area of X direction
is 0_H~FF_H at 8bit access mode and 0_H~7F_H at 16bit access mode.
• 8BIT access
0_H
1_H
0 _H 8bit 8bit
X-address
FE_H FF_H
8bit 8bit
Y-address
51_H
• 16 BIT access
0_H
8bit 8bit
0_H
16bit
Y-address
X-address
8bit 8bit
7F_H
16bit
51_H
16bit
16bit
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