RFM65W Datasheet, PDF (16/71 Pages) List of Unclassifed Manufacturers – ISM RECEIVER MODULE

ADVANCED COMMUNICATIONS & SENSING
RFM65W
DATASHEET
3.3.2. CLKOUT Output
The reference frequency, or a fraction of it, can be provided on DIO5 pin by modifying bits ClkOut in RegDioMapping2. Two
typical applications of the CLKOUT output include:
z _{To provide a clock output for a companion processor, thus saving the cost of an additional oscillator. CLKOUT can be}
made available in any operation mode except Sleep mode and is automatically enabled at power on reset.
z To provide an oscillator reference output. Measurement of the CLKOUT signal enables simple software trimming of the
initial crystal tolerance.
Note to minimize the current consumption of the RFM65W, please ensure that the CLKOUT signal is disabled when
not required.
3.3.3. PLL Architecture
The frequency synthesizer generating the LO frequency for the receiver is a fractional-N sigma-delta PLL. The PLL
incorporates a third order loop capable of fast auto-calibration, and it has a fast switching-time. The VCO and the loop filter
are both fully integrated, removing the need for an external tight-tolerance, high-Q inductor in the VCO tank circuit.
3.3.3.1. VCO
The VCO runs at 2, 4 or 6 times the RF frequency (respectively in the 915, 434 and 315 MHz bands) to reduce any LO
leakage in receiver mode, to improve the quadrature precision of the receiver.
The VCO calibration is fully automated. A coarse adjustment is carried out at power on reset, and a fine tuning is
performed each time the RFM65W PLL is activated. Automatic calibration times are fully transparent to the end-user, as
their processing time is included in the TS_RE specifications.
3.3.3.2. PLL Bandwidth
The bandwidth of the RFM65W Fractional-N PLL is wide enough to allow for very fast PLL lock times, enabling both
short startup and fast hop times required for frequency agile applications.
3.3.3.3. Carrier Frequency and Resolution
The RFM65W PLL embeds a 19-bit sigma-delta modulator and its frequency resolution, constant over the whole
frequency range, and is given by:
F=
STE P
F_{X O S C}
----------------
2¹⁹
The carrier frequency is programmed through RegFrf, split across addresses 0x07 to 0x09:
F_RF = F_STEP Frf(23,0)
Note The Frf setting is split across 3 bytes. A change in the center frequency will only be taken into account when the
least significant byte FrfLsb in RegFrfLsb is written.
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