UG-6028GDEBF02 Datasheet, PDF (15/28 Pages) List of Unclassifed Manufacturers – Product Specification

WiseChip Semiconductor Inc.
3.3.4 RGB Interface Timing Characteristics:
Symbol Description
Min
t_DCYC Dot Clock Cycle
100
t_DLW Dot “L” Pulse Width
50
t_DHW Dot “H” Pulse Width
50
t_DS
Data Setup Timing
5
t_DH Data Hold Timing
5
t_VLW Vsync Pulse Width
1
t_HLW Hsync Pulse Width
1
* All the timing reference is 10% and 90% of V_DDIO.
Doc. No: SAS1-0I013-A
(V_DD = 2.8V, T_a = 25°C)
Max Unit Port
-
ns
-
ns DOTCLK
-
ns
-
ns
D[17:12]
-
ns
- DOTCLK _VSYNC
- DOTCLK ^HSYNC
DTST: Setup Time for Data Transmission
* VSYNC, HSYNC, ENABLE, and D[17:12] should be transmitted by 3 clocks for one pixel (RGB).
http://www.wisechip.com.tw
4D Systems Pty Ltd
12
www.4dsystems.com.au