KSZ8463MLI-EVAL Datasheet, PDF (14/16 Pages) List of Unclassifed Manufacturers – KSZ8463ML/RL Evaluation Board User Guide

KSZ8463_eval_bd_user_guide_1.1.docx
3.8 List of Jumpers and Connectors
Jumper
J12-13
J14
JP2
JP3, 9
JP10, 11
JP27
JP28
JP32, 33
JP34, 35
JP36-38
JP77, 78
JP79
JP301-305
JP306
JP400
JP403-406
Description
FXSD pin connections
USB IO voltage selection
PWRDN Chip Power-down
Factory Usage
Power selection for the Fiber module
MII bypass
Enable RMII mode reference clock output from
REFCLK_O pin
Enable MDIO interface through MII connector
KSZ8463 serial port connections
GPIO7, GPIO9 and GPIO10 pin source
selection on GPIO Headers
FXSD1, FXSD2 Fiber signal detect input for
Port 1 and Port 2 (not used)
Enable USB controller interface
Strapping options
Not used
5V DC input selection
Power-supply strapping options
Setting
Pins 1-2 closed: connect to SD signal
from fiber module
Pins 3-4 closed: ground the FXSD pins,
for copper mode
Close pins 1-2 or 2-3 to power USB to
serial interface. Either setting will work.
Place Jumper for full chip power-down
Install no jumpers
Leave open when no Fiber Module
present
Pins 1-2 closed: Enable MII bypass mode
Pins 2-3 closed: MII PHY mode normal
operation
Pins 1-2 closed: Enable
Pins 2-3 closed: Disable
Place both jumpers to connect MDIO
signals from MII connector to KSZ8463
serial port.
When using SPI, do not install jumpers.
Place both jumpers for USB port access
and SPI interface
Pins 1-2 closed for KSZ8463RL/FRL
Pins 2-3 closed for KSZ8463ML/FML
Close pins 1-2, 3-4, 5-6 and 7-8 to
connect USB controller to serial bus
See Table 1
See Table 2
See Table 2
Table 9 List of Jumpers and Connectors
Micrel, Inc.
Confidential
14/16
July 17, 2013
Rev. 1.1