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LM3S301 Datasheet, PDF (130/373 Pages) List of Unclassifed Manufacturers – Microcontroller
General-Purpose Input/Outputs (GPIOs)
Register 17: GPIO Slew Rate Control Select (GPIOSLR), offset 0x518
The GPIOSLR register is the slew rate control register. Slew rate control is only available when
using the 8-mA drive strength option via the GPIO 8-mA Drive Select (GPIODR8R) register (see
page 126).
GPIO Slew Rate Control Select (GPIOSLR)
Offset 0x518
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
SRL
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:8
7:0
Name
reserved
SRL
Type
RO
R/W
Reset
0
0
Description
Reserved bits return an indeterminate value, and should never
be changed.
Slew Rate Limit Enable (8-mA drive only)
0: Slew rate control disabled.
1: Slew rate control enabled.
130
October 6, 2006
Preliminary