QT60240-ATG Datasheet, PDF (13/26 Pages) List of Unclassifed Manufacturers – 16 AND 24 KEY QMATRIX TOUCH SENSOR ICs

Table 4.2 Bits for Key Reporting and Numbering
Address
1
2
3
Bit Number
76543210
76543210
15 14 13 12 11 10 9 8
23 22 21 20 19 18 17 16
Note: the device should be reset after disabling keys
because, if a key was in detect when it was disabled, it could
incorrectly report detect.
4.5 Raw Data Commands
Addresses 4 to 123 allow data to be read for each key. There
are a total of 24 keys and 5 bytes of data per key, yielding a
total of 120 addresses. These addresses are read-only.
The data for the keys is mapped in sequence, starting with
key 0 at addresses 4 to 8. The data for key 15 is located at
addresses 79 to 83, and that for key 23 is located at
addresses 119 to 123. Table 4.3 summarizes this.
Address
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19 to 118
119
120
121
122
123
Table 4.3 Key Data
Key #
0
0
0
0
0
1
1
1
1
1
2
2
2
2
2
3 to 22
23
23
23
23
23
Use
Signal LSB
Signal MSB
Reference LSB
Reference MSB
DetectCount (lower nibble)
Signal LSB
Signal MSB
Reference LSB
Reference MSB
DetectCount (lower nibble)
Signal LSB
Signal MSB
Reference LSB
Reference MSB
DetectCount (lower nibble)
Range of values
Signal LSB
Signal MSB
Reference LSB
Reference MSB
DetectCount (lower nibble)
There are five bytes of data for each key. The first two are the
key’s 16-bit signal, and the second two are the key’s 16-bit
reference. These are followed by the Detect Integrator Count,
which is a 4-bit value stored in the lower nibble. In the case of
both the signal and reference, the 16-bit values are accessed
as two 8-bit bytes, stored LSB first.
4.6 Cal All
A value of 0x55 must be written to address 125. Upon
receiving this command the QT60xx0 will recalibrate all of the
keys. Recalibration will start at the beginning of the next full
matrix scan and last for one scan cycle.
4.7 Setups
The location “Setups write-unlock”, address 130, allows write
access to the setups. Normally the setups are write-protected;
the write-protection is engaged as soon as a read operation is
performed at any address. By writing a value of 0x55 to this
address, the write-protection is disengaged. This address is
located conveniently immediately before the setups so that
the write protection may be disengaged and the setups
written in a single I²C communication sequence. Reading this
address is undefined.
Addresses 131 to 252 provide read/write access to the
setups. Details of different setups can be found in Section 6,
page 17.
When the host is writing a new setup block the values are
being recorded into EEPROM as they arrive from the host.
lQ
13
QT60240-ISG R8.06/0906