TS30012 Datasheet, PDF (12/18 Pages) List of Unclassifed Manufacturers – High Efficiency 1A/2A/3A Current-Mode Synchronous Buck DC/DC Converter, 1MHz

TS30011/12/13
Version 1.6
TYPICAL APPLICATION SCHEMATIC
VCC
CBYPASS
10uF 35V
CBYPASS2
0.1uF
(optional)
VCC
BST
VSW
CBST
22nF
LOUT
4.7uH
DCATCH
(optional)
COUT1
22uF 10V
COUT2
22uF 10V
V_OUT
2.5V
EN
RTOP
FB
17.8K
VOUT
EN
RBOT
RPUP
10K
10K
(optional)
PG
PG
Figure 22: TS30011/12/13 Application Schematic
A minimal schematic suitable for most applications is shown on page 1. Figure 22 includes optional
components that may be considered to address specific issues as listed in the External Component
Selection section.
PCB LAYOUT
For proper operation and minimum EMI, care must be taken during PCB layout. An improper layout can lead to issues such as
poor stability and regulation, noise sensitivity and increased EMI radiation. (figure 23) The main guidelines are the following:
 provide low inductive and resistive paths for loops with high di/dt,
 provide low capacitive paths with respect to all the other nodes for traces with high di/dt,
 sensitive nodes not assigned to power transmission should be referenced to the analog signal ground (GND) and be
always separated from the power ground (PGND).
The negative ends of CBYPASS, COUT and the Schottky diode DCATCH (optional) should be placed close to each other and connected
using a wide trace. Vias must be used to connect the PGND node to the ground plane. The PGND node must be placed as close as
possible to the TS30011/12/13 PGND pins to avoid additional voltage drop in traces.
The bypass capacitor CBYPASS (optionally paralleled to a 0.1µF capacitor) must be placed close to the VCC pins of
TS30011/12/13.
The inductor must be placed close to the VSW pins and connected directly to COUT in order to minimize the area between the
VSW pin, the inductor, the COUT capacitor and the PGND pins. The trace area and length of the switching nodes VSW and BST
should be minimized.
For the adjustable output voltage version of the TS30011/12/13, feedback resistors RBOT and RTOP are required for Vout
settings greater than 0.9V and should be placed close to the TS30011/12/13 in order to keep the traces of the sensitive node FB
as short as possible and away from switching signals. RBOT should be connected to the analog ground pin (GND) directly and
should never be connected to the ground plane. The analog ground trace (GND) should be connected in only one point to the
power ground (PGND). A good connection point is under the TS30011/12/13 package to the exposed thermal pad and vias
which are connected to PGND. RTOP will be connected to the VOUT node using a trace that ends close to the actual load.
For fixed output voltage versions of the TS30011/12/13, RBOT and RTOP are not required and the FB pin should be connected
directly to the Vout.
Specifications subject to change
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