NUC960ADN Datasheet, PDF (103/420 Pages) Nuvoton Technology Corporation – 32-BIT ARM926EJ-S BASED MCU

NUC960ADN
6.6.1.2
Tx Buffer Descriptor
32-BIT ARM926EJ-S BASED MCU
33
10
O
11
65
Reserved
3210
I CP
Transmit Buffer Starting Address
BO
Tx Status
Transmit Byte Count
Next Tx Descriptor Starting Address
Tx Descriptor Word 0
31
30
29
Owner
23
22
21
15
14
13
7
6
5
Reserved
28
27
Reserved
20
19
Reserved
12
11
Reserved
4
3
26
18
10
2
IntEn
25
24
17
16
9
8
1
CRCApp
0
PadEn
Bits
Descriptions
[31]
Owner
Ownership
The ownership field defines which one, the CPU or EMC, is the owner of
each Tx descriptor. Only the owner has right to modify the Tx descriptor
and the other can read the Tx descriptor only.
0: The owner is CPU
1: The owner is EMC
If the O=1’b1 indicates the EMC TxDMA is the owner of Tx descriptor and
the Tx descriptor is available for frame transmission. After the frame
transmission completed, EMC TxDMA modify ownership field to 1’b0 and
return the ownership of Tx descriptor to CPU.
If the O=1’b0 indicates the CPU is the owner of Tx descriptor. After the
CPU prepares new frame to wait transmission, it modifies the ownership
field to 1’b1 and releases the Tx descriptor to EMC TxDMA.
103
Publication Release Date: Jun. 18, 2010
Revision: A3