TLA7SA00 Datasheet, PDF (1/14 Pages) List of Unclassifed Manufacturers – Tektronix PCI Express Logic Protocol Analyzer

Tektronix PCI Express Logic Protocol Analyzer
TLA7SA00 Series Datasheet
The TLA7SA00 Series logic protocol analyzer modules provide an
innovative approach to PCI Express validation that spans all layers of the
protocol from the physical layer to the transaction layer. Feature rich
software provides improved information density for viewing statistical
summary and protocol analysis using innovative Transaction and Summary
Profile windows. Hardware capabilities including hardware acceleration,
OpenEYE, ScopePHY, and FastSYNC provide fast access to data and
helps shorten the time it takes to build confidence in the test system.
Powerful trigger and filtering capabilities provide the ability to quickly focus
on the data of interest. A complete suite of probing solutions targeted for
various form factors and applications.
Key performance specifications
PCI Express Gen1, Gen2, and Gen3 Protocol to Physical Layer
Analysis for link widths from x1 through x16 with up to 8.0 GT/s
acquisition rates.
Industry's deepest 8 GB memory/module (16 GB memory, x16 link
width) increases the chances of capturing an error and the fault that
caused the error.
Key features
Comprehensive PCI Express probing solutions, including midbus, slot
interposer, and solder-down probes.
Nonintrusive probing that uses OpenEYE technology incorporating
automatic tuning equalization circuitry to allow probing anywhere
on the channel and ensures accurate data capture in PCI Express
systems with channel lengths up to 24 in. and two connectors.
Single-click calibration process calibrates the analyzer and probes
to the target BER. Calibration results for analyzer/probe sets are
remembered from one session to another.
ScopePHY provides the ability to quickly connect any of the PCI
Express midbus, slot interposer, or solder-down probes to a high-
performance oscilloscope providing a more detailed analog view of
the PHY Layer.
Shorten time to gain confidence in the test system setup.
Front-panel LEDs provide status information such as link speed,
symbol lock, and link activity.
Auto-configure sets up the logic protocol analyzer system to be
ready for data acquisition quickly.
FastSYNC tracks the Link as it transitions in and out of ASPM
Power states such as L0s, regardless of electrical Idle duration.
Real-time statistics help observe link health and behavior over
time.
Powerful trigger-state machine spans all layers of the protocol.
8 States
8 Packet recognizers
4 Symbol sequence recognizers
4 Counter/Timers
4 Event flags
Conditional storage
Real-time filtering
HW accelerated search and data displays provide immediate visibility
of data regardless of record length.
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