MDT10C23 Datasheet, PDF (9/19 Pages) List of Unclassifed Manufacturers – Fully CMOS static design, 8-bit data bus,On chip ROM size : 2 K words

MDT10C23
Instruction Code
010000 00000011
010000 00000100
010000 00000rrr
010001 1rrrrrrr
011000 trrrrrrr
111010 iiiiiiii
010111 trrrrrrr
011001 trrrrrrr
011010 trrrrrrr
011011 trrrrrrr
011100 trrrrrrr
Mnemonic
Operands
TMODE
Function
Load W to TMODE register
RET
Return
CPIO R
Control I/O port register
STWR R
Store W to register
LDR R, t
Load register
LDWI I
Load immediate to W
SWAPR R, t Swap halves register
INCR R, t Increment register
INCRSZ R, t Increment register, skip if zero
ADDWR R, t Add W and register
SUBWR R, t Subtract W from register
011101 trrrrrrr
011110 trrrrrrr
010010 trrrrrrr
110100 iiiiiiii
010011 trrrrrrr
110101 iiiiiiii
010100 trrrrrrr
110110 iiiiiiii
011111 trrrrrrr
010110 trrrrrrr
DECR R, t
DECRSZ R, t
ANDWR R, t
ANDWI i
IORWR R, t
IORWI i
XORWR R, t
XORWI i
COMR R, t
RRR R, t
Decrement register
Decrement register, skip if zero
AND W and register
AND W and immediate
Inclu. OR W and register
Inclu. OR W and immediate
Exclu. OR W and register
Exclu. OR W and immediate
Complement register
Rotate right register
010101 trrrrrrr
RLR R, t Rotate left register
010000 1xxxxxxx
010001 0rrrrrrr
0000bb brrrrrrr
0010bb brrrrrrr
0001bb brrrrrrr
0011bb brrrrrrr
100nnn nnnnnnnn
101nnn nnnnnnnn
110000 nnnnnnnn
110001 iiiiiiii
11001n nnnnnnnn
CLRW
CLRR R
BCR R, b
BSR R, b
BTSC R, b
BTSS R, b
LCALL n
LJUMP n
CALL n
RTIW i
JUMP n
Clear working register
Clear register
Bit clear
Bit set
Bit Test, skip if clear
Bit Test, skip if set
Long CALL subroutine
Long JUMP to address
Call subroutine
Return, place immediate to W
JUMP to address
Operating
Status
W TMODE
None
Stack PC
None
W CPIO r
None
WR
None
Rt
Z
IW
None
[R(0~3)↔R(4~7)] t
None
R+1 t
Z
R+1 t
None
W+R t
C, HC, Z
R W t (R+/W+1
t)
R 1t
C, HC, Z
Z
R 1t
None
R Wt
Z
i WW
Z
R Wt
Z
i WW
Z
R Wt
Z
i WW
Z
/R t
Z
R(n) R(n-1), C
C
R(7), R(0) C
R(n) r(n+1),
C
C R(0), R(7) C
0W
Z
0R
Z
0 R(b)
None
1 R(b)
None
Skip if R(b)=0
None
Skip if R(b)=1
None
n PC, PC+1 Stack None
n PC
None
n PC, PC+1 Stack None
Stack PC,i W
None
n PC
None
This specification are subject to be changed without notice. Any latest information
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P. 9
2004/7 Ver. 1.1