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CS18LV20483 Datasheet, PDF (8/16 Pages) List of Unclassifed Manufacturers – High Speec Super Low Power SRAM
High Speed Super Low Power SRAM
256K-Word By 8 Bit
CS18LV20483
AC TEST LOADS AND WAVEFORMS
FIGURE 1A
FIGURE 1B
TERMINAL EQUIVALENT
667Ω
OUTPUT
1.73V
VCC
GND
ALL INPUT PULSES
10%
90% 90%
10%
FIGURE 2 5ns
5ns
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc = 3.3V )
< READ CYCLE >
JEDEC Parameter
Description
-55
-70
Parameter Name
MIN MAX MIN MAX
Name
tAVAX
tRC Read Cycle Time
55
70
tAVQV
tAA Address Access Time
55
70
tELQV
tCO Chip Select Access Time
55
70
tGLQV
tOE Output Enable to Output Valid
25
35
tELQX
tLZ Chip Select to Output Low Z
10
10
tGLQX
tOLZ Output Enable to Output in Low Z 5
5
tEHQZ
tCHZ Chip Deselect to Output in High Z 0 20 0 25
tGHQZ
tOHZ Output Disable to Output in High Z 0 20 0 25
tAXOX
tOH Out Disable to Address Change
10
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
Rev. 1.0
Chiplus reserves the right to change product or specification without notice.