8407201RA Datasheet, PDF (8/17 Pages) List of Unclassifed Manufacturers – MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL TRANSPARENT D-TYPE LATCHES WITH THREE STATE OUTPUTS MONOLITIC SILICON

TABLE I. Electrical performance characteristics - Continued.
Test
Propagation delay time,
output disable to any
output, OE to Qn
Symbol
tPHZ,
tPLZ
3/
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
TC = +25°C
CL = 50 pF
See figure 4
VCC = 2.0 V
VCC = 4.5 V
Group A
subgroups
9
TC = -55°C and +125°C
CL = 50 pF
See figure 4
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
10, 11
Transition time, output tTHL, T_C = +25°C
rise and fall
tTLH
CL = 50 pF
4/
See figure 4
VCC = 6.0 V
VCC = 2.0 V
9
VCC = 4.5 V
TC = -55°C and +125°C
CL = 50 pF
See figure 4
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
10, 11
VCC = 6.0 V
Limits
Unit
Min Max
150 ns
30
26
225 ns
45
38
60 ns
12
10
90 ns
18
15
1/ For a power supply of 5 V ±10%, the worst case output voltages (VOH and VOL) occur for HC at 4.5 V. Thus, the
4.5 V values should be used when designing with this supply. Worst cases VIH and VIL occur at VCC = 5.5 V and
4.5 V respectively. (The VIH value at 5.5 V is 3.85 V.) The worst case leakage currents (IIN, ICC, and IOZ) occur for
CMOS at the higher voltage, so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically
100 pF per latch, determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load
dynamic current consumption, IS = CPD VCCf + ICC.
2/ The VIH and VIL tests are not required because they are used as forcing functions for VOH or VOL.
3/ AC testing at VCC = 2.0 V and VCC = 6.0 V shall be guaranteed, if not tested, to the specified limits in table I.
4/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
F
84072
SHEET
8