VMX1C1016 Datasheet, PDF (70/76 Pages) List of Unclassifed Manufacturers – Versa Mix 8051 Mixed-Signal MCU

VMX51C1016
Power-on/Brown-Out Reset
The VMX51C1016 includes a power-on-
reset/brown-out detector circuit that ensures the
VMX51C1016 enters and stays in the reset state
as long as the supply voltage is below the reset
threshold voltage (in the order of 3.7 – 4.0 volts).
In most applications, the VMX51C1016 requires
no external components to perform a power-on
reset when the device is powered-on.
The VMX51C1016 also has a reset pin for
applications in which external reset control is
required. The reset pin includes an internal pull-
up resistor. When a power-on reset occurs, all
SFR locations return to their default values and
peripherals are disabled.
Errata:
The VMX51C1016 may fail to exit the reset state
if the supply voltage drops below the reset
threshold, but not below 3 volts. For
applications where this condition can occur, use
an external supply monitoring circuit to reset the
device.
Processor Power Control
The processor power management unit has two
modes of operation: IDLE mode and STOP
mode.
IDLE Mode
When the VMX51C1016 is in IDLE mode, the
processor clock is halted. However, the internal
clock and peripherals continue to run. The
power consumption drops because the CPU is
not active. As soon as an interrupt or reset
occurs, the CPU exits IDLE mode.
In order to enter IDLE mode, the user must set
the IDLE bit of the PCON register. Any enabled
interrupts will force the processor to exit IDLE
mode.
STOP Mode
In order to enter STOP mode, the user must set
the STOP bit of the PCON register. In this mode,
in contrast to IDLE mode, all internal clocking
shuts down. The CPU will exit this state only
when a non-clocked external interrupt or reset
occurs (internal interrupts are not possible
because they require clocking activity).
The following interrupts can restart the
processor from STOP mode: Reset, INT0, SPI
Rx/Rx Overrun, and the I²C interface.
FIGURE 46: POWER MANAGEMENT ON THE VMX51C1016
IDLE
STOP
INTERRUPT
REQUEST
CLK
CLKCPU
GATE
CLKPER
GATE
CLK FOR
CPU
CLK FOR
PERIPHERALS
The following table describes the power control
register of the VMX51C1016.
TABLE 123: (PCON) POWER CONTROL (CPU) - SFR 87H
7
654 3
2
1
SMOD - - - GF1 GF0 STOP
0
IDLE
Bit
Mnemonic
7
SMOD
6
-
5
-
4
-
3
GF1
2
GF0
1
STOP
0
IDLE
Function
The speed in Mode 2 of Serial Port 0
is controlled by this bit. When
SMOD= 1, fclk /32. This bit is also
significant in Mode 1 and 3, as it
adds a factor of 2 to the baud rate.
-
-
-
Not used for power management
Not used for power management
Stop mode control bit. Setting this bit
turns on the STOP Mode. STOP bit
is always read as 0.
IDLE mode control bit. Setting this bit
turns on the IDLE mode. IDLE bit is
always read as 0.
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