DDX-2102 Datasheet, PDF (7/17 Pages) List of Unclassifed Manufacturers – All-Digital High Efficiency Power Amplifier

DDX-2102
An increase in the time constant of the circuit will produce a longer recovery interval. Care must be
taken in the overall system design so as not to exceed the protection thresholds under normal
operation.
3.3 Power Outputs
The DDX-2102 power and output pins are duplicated to provide a low impedance path for the device’s
bridged outputs. All duplicate power, ground and output pins must be connected for proper operation.
The PWRDN or TRI-STATE pins should be used to set all MOSFETS to the Hi-Z state during power-up
until the logic power supply, V_L, is settled.
3.4 Parallel Output/High Current Operation
When using DDX^® Mode output, the DDX-2102 outputs can be connected in parallel to increase the
output current to a load. In this configuration the device can provide over 130W@4Ω (see Figure 7).
This mode is enabled with the CONFIG pin connected to VREG1 and the inputs combined
INLA = INLB, INRA = INRB and outputs combined OUTLA = OUTLB, OUTRA = OUTRB.
3.5 ADDITIONAL INFORMATION
3.6 Output Filter
A passive two-pole low-pass filter is used on the DDX-2102 power outputs to reconstruct an analog
signal. System performance can be significantly affected by the output filter design and choice of
components. (See appnote: AN-15, Component Selection for DDX Amplifiers.) A filter design for
6Ω/8Ω loads is shown in the Typical Application Circuit in Figure 19. Figure 20 shows a filter design for
4Ω loads. Figure 22 shows a filter for ½ bridge mode, 4Ω loads.
3.7 Power Dissipation &
60
Heat Sink Requirements
The power dissipated within the
50
device will depend primarily
on the supply voltage, load
40
impedance, and output
modulation level.
30
The surface mount package of
the DDX-2102 includes an
20
exposed thermal slug on the
top of the device to provide a
10
direct thermal path from the
integrated circuit to the
0
heatsink. Careful consideration
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
must be given to the overall
Slug Temperature Tc (°C)
thermal design. See Figure 5
for power derating.
Figure 5 –Power Derating Curve (Typical)
For additional thermal design
considerations, see: AN19, Power Device Thermal Calculator.
For additional design considerations with binary mode operation, see application note:
AN-16, Applying the DDX-8000/DDX-8228 in Binary Mode.
Specifications are subject to change without notice.
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CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc
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