LA8385 Datasheet, PDF (6/8 Pages) List of Unclassifed Manufacturers – 3A LOW DROPOUT POSITIVE REGULATORS

PRODUCT DATABOOK 1996/1997
LX8385-xx/8385A-xx/8385B-xx
3A LOW DROPOUT POSITIVE REGULATORS
PRODUCTION DATA SHEET
APPLICATION NOTES
OVERLOAD RECOVERY (continued)
If this limited current is not sufficient to develop the designed
voltage across the output resistor, the voltage will stabilize at some
lower value, and will never reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage down
to zero in order to make the regulator output voltage return to
regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor should
be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1 at the ripple frequency. The
capacitor value can be determined by using this equation:
C = 1 / (6.28 _* F_{R *} R1)
where: C ≡ the value of the capacitor in Farads;
select an equal or larger standard value.
F_R ≡ the ripple frequency in Hz
R1 ≡ the value of resistor R1 in ohms
At a ripple frequency of 120Hz, with R1 = 100Ω:
C = 1 / (6.28 _* 120Hz _* 100Ω) = 13.3µF
The closest equal or larger standard value should be used, in this
case, 15µF.
When an ADJ pin bypass capacitor is used, output ripple
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
M = V /V
OUT REF
where: M ≡ a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
V = 1.25V.
REF
For example, if V = 2.5V the output ripple will be:
OUT
M = 2.5V/1.25V= 2
Output ripple will be twice as bad as it would be if the ADJ pin
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8385/85A/85B ICs develop a 1.25V reference voltage between
the output and the adjust terminal (See Figure 2). By placing a resistor,
R1, between these two terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall output voltage.
Normally this current is the specified minimum load current of 10mA.
Because I is very small and constant when compared with the current
ADJ
through R1, it represents a small error and can usually be ignored.
LX8385/85A/85B
V_IN
IN
OUT
ADJ
V_REF
I_ADJ
50µA
V_OUT = V_REF
1
+
R2
R1
+ I_ADJ R2
V_OUT
R1
R2
FIGURE 2 — Basic Adjustable Regulator
LOAD REGULATION
Because the LX8385/85A/85B regulators are three-terminal devices,
it is not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire connecting
the regulator to the load. The data sheet specification for load
regulation is measured at the bottom of the package. Negative side
sensing is a true Kelvin connection, with the bottom of the output
divider returned to the negative side of the load. Although it may
not be immediately obvious, best load regulation is obtained when
the top of the resistor divider, (R1), is connected directly to the case
of the regulator, not to the load. This is illustrated in Figure 3. If R1
were connected to the load, the effective resistance between the
regulator and the load would be:
R
Peff
=
R
P
*
 ^R2+R1
 ^R1 
where: R_P ≡ Actual parasitic line resistance.
When the circuit is connected as shown in Figure 3, the parasitic
resistance appears as its actual value, rather than the higher R_Peff.
LX8385/85A/85B
ParRa^Psitic
Line Resistance
V_IN
IN
OUT
ADJ
Connect
R1 to Case
of Regulator
R1
R2
R_L
Connect
R2
to Load
FIGURE 3 — Connections For Best Load Regulation
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Copyright © 1999
Rev. 2.0a 10/00