LA8385 Datasheet, PDF (2/8 Pages) List of Unclassifed Manufacturers – 3A LOW DROPOUT POSITIVE REGULATORS

PRODUCT DATABOOK 1996/1997
LX8385-xx/8385A-xx/8385B-xx
3A LOW DROPOUT POSITIVE REGULATORS
PRODUCTION DATA SHEET
A B S O L U T E M A X I M U M R AT I N G S (Note 1)
Power Dissipation .................................................................................. Internally Limited
Input Voltage ................................................................................................................ 10V
Input to Output Voltage Differential ........................................................................... 10V
Operating Junction Temperature
Plastic (P, DD & DL Packages) ............................................................................. 150°C
Storage Temperature Range ...................................................................... -65°C to 150°C
Lead Temperature (Soldering, 10 seconds) ............................................................. 300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with
respect to Ground. Currents are positive into, negative out of the specified terminal.
T H E R M A L D ATA
P PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB, θ_JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ_JA
DD PACKAGE:
3.0°C/W
60°C/W
THERMAL RESISTANCE-JUNCTION TO TAB, θ_JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ_JA
3.0°C/W
*60°C/W
Junction Temperature Calculation: T = T + (P x θ ).
J
A
D
JA
The θ numbers are guidelines for the thermal performance of the device/pc-board system.
JA
All of the above assume no ambient airflow.
* θ_JAcan be improved with package soldered to 0.5IN² copper area over backside ground
plane or internal power plane. θ_JAcan vary from 20ºC/W to > 40ºC/W depending on
mounting technique.
PACKAGE PIN OUTS
TAB IS V_OUT
3
2
1
V_IN
V_OUT
ADJ / GND*
P PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
TAB IS V_OUT
3
V_IN
2
V_OUT
1
ADJ / GND*
DD PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
BLOCK DIAGRAM
V_IN
Bias
Circuit
Thermal
Limit Circuit
Bandgap
Circuit
Control
Circuit
Output
Circuit
SOA Protection
Circuit
V_OUT
ADJ or
GND*
* This pin GND for fixed voltage versions.
Current
Limit Circuit
2
Copyright © 1999
Rev. 2.0a 10/00